PI7C9X111SLBFDE Pericom Semiconductor, PI7C9X111SLBFDE Datasheet - Page 64

• Manufacturer Part Number: PI7C9X111SLBFDE
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X111SLBFDE

• Lead Free Status / Rohs Status: Compliant

7
GPIO[3:0] have been defined for hot-plug usage if MSK_IN=1.
GPIO[3:0] are defined for SMBUS device ID if TM0=1.
GPIO[3:0] can be further defined to serve other functions in the further generations.
With 128QFP package, additional three GPI and three GPO pins can be used when external arbiter is selected, and
REQ_L[3:1] and GNT_L[3:1] will be mapped to GPI[2:0] and GPO[2:0] respectively.
The address-strapping table of SMBUS with GPIO [3:0] pins is defined in the following table:
Table 7-1 SM Bus Device ID Strapping
The SMBus Commands of PI7C9X111SL are provided below:
Write Word protocol (PEC Disabled):
S + Slave Address[7:1] + 0(Wr) + A + 0000_1000 + A + Bus Number[7:0] + A + Device/Function + A + P
S + Slave Address[7:1] + 0(Wr) + A + 0000_1000 + A + Reg Number[7:0] + A + Reg Number[15:8] + A + P
S + Slave Address[7:1] + 0(Wr) + A + 0000_1000 + A + Data[7:0] + A + Data[15:8] + A + P
Read Word protocol (PEC Disabled):
S + Slave Address[7:1] + 0(Wr) + A + 0000_1000 + A + Bus Number[7:0] + A + Device/Function + A + P
S + Slave Address[7:1] + 0(Wr) + A + 0000_1000 + A + Reg Number[7:0] + A + Reg Number[15:8] + A + P
S + Slave Address[7:1] + 0(Wr) + A + 0000_1000 + A + Sr + Slave Address[7:1] + 1(Rd) + A + Data[7:0] + A +
Data[15:8] + N + P
Where Bus number and device/Function filed have to be 0x00
For forward bridge:
For reverse bridge:
Pericom Semiconductor - Confidential
GPIO[0] : PCI slot Card Presence Detection Input
GPIO[1] : Attention Button Pressed Input
GPIO[2] : Power Indication Output
GPIO[3] : Attention Indication Output
GPIO[0] : PCIe slot Card Presence Detection Input
GPIO[1] : MRL Sensor Input
SM Bus Address Bit
Address bit [7]
Address bit [6]
Address bit [5]
Address bit [4]
Address bit [3]
Address bit [2]
Address bit [1]
GPIO PINS AND SM BUS ADDRESS
SM Bus device ID
= 1
= 1
= 0
= GPIO [3]
= GPIO [2]
= GPIO [1]
= GPIO [0]
Page 64 of 78
Feb, 2010, Revision 1.5
PCIe-to-PCI Reversible Bridge
PI7C9X111SL