T5760NTGS Atmel, T5760NTGS Datasheet - Page 22

• Manufacturer Part Number: T5760NTGS
• Manufacturer: Atmel

Specifications of T5760NTGS

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Figure 10-4. Controlled Noise Suppression
11. Configuration of the Receiver
22
(DATA_CLK)
POLLING/_ON
Serial bi-directional
data line
T5760/T5761
Bit-check
mode
Bit check ok
The T5760/T5761 receiver is configured via two 12-bit RAM registers called OPMODE and
LIMIT. The registers can be programmed by means of the bidirectional DATA port. If the register
contents have changed due to a voltage drop, this condition is indicated by a certain output pat-
tern called reset marker (RM). The receiver must be reprogrammed in that case. After a Power-
On Reset (POR), the registers are set to default mode. If the receiver is operated in default
mode, there is no need to program the registers.
the registers. According to
the OFF command (see section
resents the register address. It selects the appropriate register to be programmed. To get a high
programming reliability, bit 15 (Stop bit), at the end of the programming operation, must be set to
0.
Table 11-1.
Table 11-2.
Preburst
Bit 1
1
0
0
Bit 15
Data
0
1
Receiving mode
Effect of Bit 1 and Bit 2 on Programming the Registers
Effect of Bit 15 on Programming the Register
Bit 2
Digital Noise
x
1
0
OFF-command
Table
Action
The receiver is set back to polling mode (OFF command)
The OPMODE register is programmed
The LIMIT register is programmed
Action
The values will be written into the register (OPMODE or LIMIT)
The values will not be written into the register
“Receiving Mode” on page
11-2, bit 1 defines if the receiver is set back to polling mode via
Start-up
mode
Bit-check
mode
Bit check ok
Table 11-3 on page 23
Preburst
Receiving mode
13) or if it is programmed. Bit 2 rep-
Data
Digital Noise
shows the structure of
Sleep
mode
4561C–RKE–05/05