T5760NTGS Atmel, T5760NTGS Datasheet

T5760NTGS

Manufacturer Part Number
T5760NTGS
Description
Manufacturer
Atmel
Datasheet

Specifications of T5760NTGS

Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
Features
1. Description
The T5760/T5761 is a multi-chip PLL receiver device supplied in an SO20 package. It
has been especially developed for the demands of RF low-cost data transmission
systems with data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code.
The receiver is well suited to operate with the Atmel’s PLL RF transmitter T5750. Its
main applications are in the areas of telemetering, security technology and keyless-
entry systems. It can be used in the frequency receiving range of f
870 MHz or f
ments made below refer to 868.3 MHz and 915.0 MHz applications.
Figure 1-1.
Frequency Receiving Range of
f
30 dB Image Rejection
Receiving Bandwidth B
Fully Integrated LC-VCO and PLL Loop Filter
Very High Sensitivity with Power Matched LNA
High System IIP3 (–16 dBm), System 1-dB Compression Point (–25 dBm)
High Large-signal Capability at GSM Band
(Blocking –30 dBm at +20 MHz, IIP3 = –12 dBm at +20 MHz)
5V to 20V Automotive Compatible Data Interface
Data Clock Available for Manchester- and Bi-phase-coded Signals
Programmable Digital Noise Suppression
Low Power Consumption Due to Configurable Polling
Temperature Range –40°C to +105°C
ESD Protection 2 kV HBM, All Pins
Communication to Microcontroller Possible Via a Single Bi-directional Data Line
Low-cost Solution Due to High Integration Level with Minimum External Circuitry
Requirements
0
Remote control transmitter
T5750
= 868 MHz to 870 MHz or f
UHF ASK/FSK
XTO
0
Power
PLL
VCO
amp.
= 902 MHz to 928 MHz for ASK or FSK data transmission. All the state-
System Block Diagram
Antenna
IF
= 600 kHz for Low Cost 90-ppm Crystals
0
= 902 MHz to 928 MHz
Antenna
T5760/
T5761
LNA
Remote control receiver
Demod.
IF Amp
UHF ASK/FSK
VCO
PLL
Control
XTO
0
= 868 MHz to
1...5
µC
UHF ASK/FSK
Receiver
T5760/T5761
Rev. 4561C–RKE–05/05

Related parts for T5760NTGS

T5760NTGS Summary of contents

Page 1

... RF low-cost data transmission systems with data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code. The receiver is well suited to operate with the Atmel’s PLL RF transmitter T5750. Its main applications are in the areas of telemetering, security technology and keyless- entry systems ...

Page 2

Figure 1-2. Block Diagram CDEM SENS AVCC AGND DGND DVCC LNAREF LNA_IN LNA LNAGND T5760/T5761 2 FSK/ASK- Dem_out demodulator and data filter Rssi Limiter out RSSI IF Amp. Sensitivity- Polling circuit reduction control logic 4. Order f0 = 950 kHz/ ...

Page 3

Pin Configuration Figure 2-1. Pinning SO20 Table 2-1. Pin Description Pin Symbol 1 SENS 2 IC_ACTIVE 3 CDEM 4 AVCC 5 TEST 1 6 AGND LNAREF 9 LNA_IN 10 LNAGND 11 TEST 2 12 TEST 3 ...

Page 4

RF Front End The RF front end of the receiver is a low-IF heterodyne configuration that converts the input sig- nal into a 950 kHz/1 MHz IF signal with an image rejection of typical 30 dB. According to 2-1 ...

Page 5

To determine f frequency tuned by the crystal frequency The relation is designed to achieve the nominal IF frequency of f version. For the 915 MHz version an ...

Page 6

Since different RF input networks may exhibit slightly different values for the LNA gain, the sen- sitivity values given in the electrical characteristics refer to a specific input matching. This matching is illustrated in the same time power matching at ...

Page 7

The cut-off frequency of the lowpass filter is defined by the selected baud-rate range (BR_Range). The BR_Range is defined in the OPMODE register (refer to section of the Receiver” on page The T5760/T5761 is designed to operate with data coding ...

Page 8

Figure 5-2. 6. Polling Circuit and Control Logic The receiver is designed to consume less than 1 mA while being sensitive to signals from a cor- responding transmitter. This is achieved via the polling circuit. This circuit enables the signal ...

Page 9

Most applications are dominated by two transmission frequencies: f used in USA, f parameters on this electrical characteristics display three conditions for each parameter. • Application USA (f • Application Europe (f • Other applications The electrical characteristic is given ...

Page 10

In US- and European applications, the maximum value The time resolution is about that case. The sleep time can be extended to almost half a second by setting X According to permanent sleep ...

Page 11

Figure 8-2. Timing Diagram for Complete Successful Bit Check (Number of checked Bits: 3) IC_ACTIVE Bit check Dem_out Data_out (DATA) T Start-up Start-up mode 8.2 Bit-check Mode In bit-check mode the incoming data stream is examined to distinguish between a ...

Page 12

For best noise immunity it is recommended to use a low span between T This is achieved using a fixed frequency at a 50% duty cycle for the transmitter preburst. A ‘11111...’ ‘10101...’ sequence in Manchester or Bi-phase ...

Page 13

Figure 8-5. Timing Diagram for Failed Bit Check (Condition: CV_Lim < Lim_min) (Lim_min = 14, Lim_max = 24) IC_ACTIVE Bit check Dem_out Bit-check- 0 counter T Start-up Start-up mode Figure 8-6. Timing Diagram for Failed Bit Check (Condition: CV_Lim (Lim_min ...

Page 14

Digital Signal Processing The data from the ASK/FSK demodulator (Dem_out) is digitally processed in different ways and as a result converted into the output signal data. This processing depends on the selected baud- rate range (BR_Range). clock cycle T ...

Page 15

Figure 8-9. Steady L State Limited DATA Output Pattern After Transmission IC_ACTIVE Bit check Dem_out Data_out (DATA) Start-up mode After the end of a data transmission, the receiver remains active. Depending of the bit Noise_Disable in the OPMODE register, the ...

Page 16

Figure 8-10. Timing Diagram of the OFF Command via Pin DATA IC_ACTIVE Out1 (microcontroller) X Data_out (DATA) Serial bi-directional X data line Receiving mode Figure 8-11. Timing Diagram of the OFF Command via Pin POLLING/_ON IC_ACTIVE POLLING/_ON Data_out (DATA) Serial ...

Page 17

Figure 8-11 on page 16 ING/_ON. The pin POLLING/_ON must be held to low for the time period t edge on pin POLLING/_ON and the delay t T Sleep This command is faster than using pin DATA at the cost ...

Page 18

It is recommended to use the function of the data clock only in conjunction with the bit check the bit check is set the receiver is set to receiving mode via the ...

Page 19

Figure 9-3. Data Clock Disappears Because of a Logical Error Dem_out Data_out (DATA) DATA_CLK Figure 9-4. Output of the Data Clock After a Successful Bit Check Dem_out Data_out (DATA) DATA_CLK The delay of the data clock is calculated as follows: ...

Page 20

Figure 9-5. Figure 9-6. 10. Digital Noise Suppression After a data transmission, digital noise appears on the data output (see Preventing that digital noise keeps the connected microcontroller busy. It can be suppressed in two different ways. 10.1 Automatic Noise ...

Page 21

Figure 10-1. Output of Digital Noise at the End of the Data Stream Bit check ok Preburst Data_out (DATA) DATA_CLK Receiving mode, Bit-check data clock control mode logic active Figure 10-2. Automatic Noise Suppression Bit check ok Preburst Data_out (DATA) ...

Page 22

Figure 10-4. Controlled Noise Suppression Bit check ok Serial bi-directional Preburst data line (DATA_CLK) POLLING/_ON Bit-check mode 11. Configuration of the Receiver The T5760/T5761 receiver is configured via two 12-bit RAM registers called OPMODE and LIMIT. The registers can be ...

Page 23

Table 11-3. Effect of the Configuration Words within the Registers Bit 1 Bit 2 Bit 3 Bit 4 1 – – – – BR_Range 0 1 Baud1 Baud0 BitChk1 Default values Bit 3...14 – Lim_ ...

Page 24

Table 11-5. Table 11-6. Table 11-7. Sleep4 ... 0 ... Table 11-8. Table 11-9. Noise Suppression T5760/T5761 24 Effect of the Configuration word N N Bit-check BitChk1 BitChk0 ...

Page 25

Table 11-10. Effect of the Configuration Word Lim_min (1) Lim_min (Lim_min < not Applicable) Lim_min5 Lim_min4 Lim_min3 Note: 1. Lim_min ...

Page 26

Conservation of the Register Information The T5760/T5761 implies an integrated power-on reset and brown-out detection circuitry to pro- vide a mechanism to preserve the RAM register information. According to below the threshold voltage V tion registers in that condition. ...

Page 27

Programming the Configuration Register Figure 13-1. Timing of the Register Programming IC_ACTIVE Out1 (microcontroller) Data_out (DATA) X Serial bi-directional X data line Receiving mode Figure 13-2. Data Interface V/5 V ...

Page 28

Bit 15 is followed by the equivalent time window t9. During this window, the equivalence acknowledge pulse t8 (E_Ack) occurs if the just programmed mode word is equivalent to the mode word that was already stored in that register. E_Ack ...

Page 29

Figure 14-1. Application Circuit 4.7µ 10% GND RF_IN C17 1.5p ±0.1p np0 Figure 14-2. Application Circuit 4.7µ 10% GND Toko LL1608-FS12NJ RF_IN 12 nH IN_GND C2 3 CASE_GND 3.3p 4 ...

Page 30

Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated ...

Page 31

Electrical Characteristics (Continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameter Test Conditions Symbol Average bit- check time while polling applied ...

Page 32

Electrical Characteristics (Continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameter Test Conditions Symbol Delay to activate the start-up Ton1 mode (see Figure ...

Page 33

Electrical Characteristics (Continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameter Test Conditions Symbol Equivalent acknowledge t8 pulse: E_Ack Equivalent t9 time window ...

Page 34

Electrical Characteristics (continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameters Local Oscillator Operating frequency range VCO Phase noise local oscillator Spurious of ...

Page 35

Electrical Characteristics (continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameters Input sensitivity FSK Sensitivity variation FSK for the full operating range compared ...

Page 36

Electrical Characteristics (continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameters Reduced sensitivity Reduced sensitivity variation over full operating range Reduced sensitivity variation ...

Page 37

Ordering Information Extended Type Number T5760N-TGS T5760N-TGQ T5761N-TGS T5761N-TGQ 20. Package Information Package SO20 Dimensions in mm 0.4 1. 21. Revision History Please note that the following page numbers referred to in this section refer to the ...

Page 38

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Related keywords