T5760NTGS Atmel, T5760NTGS Datasheet - Page 10

• Manufacturer Part Number: T5760NTGS
• Manufacturer: Atmel

Specifications of T5760NTGS

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Figure 8-1.
10
T5760/T5761
Polling Mode Flow Chart
NO
Receiving mode:
The receiver is turned on permanently
and passes the data stream to the
connected microcontroller.
It can be set to Sleep mode through an
OFF command via Pin DATA or
POLLING/_ON.
Output level on Pin IC_ACTIVE => high
I
S
Sleep mode:
All circuits for signal processing are
disabled. Only XTO and Polling logic is
enabled.
Output level on Pin IC_ACTIVE => low
I
Start-up mode:
The signal processing circuits are
enabled. After the start-up time (T
all circuits are in stable
condition and ready to receive.
Output level on Pin IC_ACTIVE => high
Bit-check mode:
The incomming data stream is
analyzed. If the timing indicates a valid
transmitter signal, the receiver is set to
receiving mode. Otherwise it is set to
Sleep mode.
Output level on Pin IC_ACTIVE => high
I
T
I
T
T
S
S
S
= I
Sleep
Startup
Bit-check
= I
= I
= I
Son
Soff
Son
Son
In US- and European applications, the maximum value of T
to 1. The time resolution is about 2 ms in that case. The sleep time can be extended to almost
half a second by setting X
According to
permanent sleep condition. The receiver remains in that condition until another value for Sleep is
programmed into the OPMODE register. This function is desirable where several devices share
a single data line and may also be used for microcontroller polling – via pin POLLING/_ON, the
receiver can be switched on and off.
= Sleep x X
OFF command
Bit check
Sleep
OK ?
x 1024 x T
YES
Table 11-7 on page
Clk
Startup
)
Sleep
to 8. X
24, the highest register value of sleep sets the receiver into a
T
Sleep:
X
T
T
Sleep
Startup
Sleep
Bit-check
Clk
:
:
:
can be set to 8 by bit X
:
5-bit word defined by Sleep0 to
Sleep4 in OPMODE register
Extension factor defined by
XSleepStd
Basic clock cycle defined by fXTO
and Pin MODE
Is defined by the selected baud rate
range and TClk. The baud-rate range
is defined by Baud0 and Baud1 in
the OPMODE register.
Depends on the result of the bit check
If the bit check is ok, T
depends on the number of bits to be
checked (N
utilized data rate.
If the bit check fails, the average
time period for that check depends
on the selected baud-rate range and
defined by Baud0 and Baud1 in the
OPMODE register.
according to Table 9
on T
Clk
. The baud-rate range is
Bit-check
) and on the
Sleep
Bit-check
SleepStd
is about 60 ms if X
to’1’.
4561C–RKE–05/05
Sleep
is set