T5760NTGS Atmel, T5760NTGS Datasheet - Page 13

• Manufacturer Part Number: T5760NTGS
• Manufacturer: Atmel

Specifications of T5760NTGS

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Figure 8-5.
Figure 8-6.
8.4
8.5
4561C–RKE–05/05
Duration of the Bit Check
Receiving Mode
IC_ACTIVE
Bit check
Dem_out
Bit-check-
counter
IC_ACTIVE
Bit check
Dem_out
Bit-check-
counter
(Lim_min = 14, Lim_max = 24)
(Lim_min = 14, Lim_max = 24)
Timing Diagram for Failed Bit Check (Condition: CV_Lim < Lim_min)
Timing Diagram for Failed Bit Check (Condition: CV_Lim
Start-up mode
Start-up mode
T
T
If no transmitter signal is present during the bit check, the output of the ASK/FSK demodulator
delivers random signals. The bit check is a statistical process and T
Therefore, an average value for T
depends on the selected baud-rate range and on T
value for T
In the presence of a valid transmitter signal, T
nal, f
a longer period for T
If the bit check was successful for all bits specified by N
mode. According to
that case and the data clock is available after the start bit has been detected (see
page
the data clock at pin DATA_CLK. The receiver stays in that condition until it is switched back to
polling mode explicitly.
0
Start-up
0
Start-up
Sig
18). A connected microcontroller can be woken up by the negative edge at pin DATA or by
, and the count of the checked bits, N
1
1
2 3 4 5 6
2 3 4 5 6
Bit-check
resulting in a lower current consumption in polling mode.
1
7
Bit-check
Figure 8-2 on page
Bit-check mode
2
1
3
2
T
Bit-check
4 5
3
4 5
Bit-check mode
1/2 Bit
requiring a higher value for the transmitter pre-burst T
6 7 8 9
T
6 7 8 9
Bit-check
Bit check failed ( CV_Lim < Lim_min )
10
10
Bit-check
11 12
1/2 Bit
11 12
11, the internal data signal is switched to pin DATA in
13 14 15 16 17 18 19
Bit-check
is given in the electrical characteristics. T
Bit-check
Lim_max)
. A higher value for N
Sleep mode
Clk
0
T
. A higher baud-rate range causes a lower
is dependent on the frequency of that sig-
Sleep
20
Bit check failed ( CV_Lim
Bit-check
21 22 23 24
, the receiver switches to receiving
Bit-check
Sleep mode
Bit-check
T5760/T5761
T
0
varies for each check.
Sleep
Lim_max )
thereby results in
Preburst
Figure 9-1 on
.
Bit-check
13