21154BC Intel, 21154BC Datasheet - Page 29

• Manufacturer Part Number: 21154BC
• Manufacturer: Intel

Specifications of 21154BC

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

9.
Figure 6.
10.
Table 13.
21154 PCI-to-PCI Bridge Specification Update
Section 6.3.1, Signal trst_l Pull-Down Resistor, New Section
The following new section has been added:
A 5 K Ω pull-down resistor is required on trst_l for normal PCI-to-PCI bridge operation. However,
some JTAG test results may be inconclusive if the 5 K Ω resistor remains in the circuit. To obtain
accurate JTAG results, Intel recommends one of the following solutions:
Removal of Pull-Down Resistor for JTAG Testing
Section 2.10, JTAG Signals, Table 13
The description for trst_l has been changed as follows:
JTAG Signals
Signal Name
•
•
•
Verify that the JTAG test equipment, after driving trst_l low to reset the TAP controller,
constantly drives trst_l high during JTAG tests. If this signal is not constantly driven high, the
5 K Ω resistor will pull the signal to a low state.
Remove the 5 K Ω resistor during JTAG tests. This resistor must be installed during normal
PCI-to-PCI bridge operation.
Design external circuits with a switch or jumper to isolate the 5 K Ω resistor during JTAG tests
(see Figure 6). This switch must enable the resistor during normal PCI-to-PCI bridge
operation.
trst_l
tms
tdi
Type
I
I
I
JTAG serial data in. Signal tdi is the serial input through which JTAG instructions
and test data enter the JTAG interface. The new data on tdi is sampled on the
rising edge of tck. An unterminated tdi is pulled high by a weak pull-up resistor
internal to the device.
JTAG test mode select. Signal tms causes state transitions in the test access port
(TAP) controller. An unterminated tms is pulled high by a weak pull-up resistor
internal to the device.
JTAG TAP reset and disable. When asserted low, JTAG is disabled and the TAP
controller is asynchronously forced to enter a reset state, which in turn
asynchronously initializes other test logic. An unterminated trst_l is pulled high by a
weak pull-up resistor internal to the device. The TAP controller must be reset
before the JTAG circuits can function. For normal JTAG TAP port operation, this
signal must be high.
For normal PCI-to-PCI bridge operation of the device, this signal must be pulled
low using a 5K resistor.
or Jumper
Switch
5K
Ω
trst_l
V
DD
21154
50K
Description
Ω
Documentation Changes
Intel Confidential29
A7821-01