21154BC Intel, 21154BC Datasheet - Page 22

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21154BC

Manufacturer Part Number
21154BC
Description
Manufacturer
Intel
Datasheet

Specifications of 21154BC

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Package Type
BGA
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
21154BC
Manufacturer:
INTEL
Quantity:
20 000
Specification Changes
Specification Changes
1.
2.
Table 1.
3.
4.
Table 2.
22Intel Confidential
Note: The following changes (2-4) are specific to the 21154AE/BE version of the product only.
Note: The pin designations have not changed. The only change was that the printed label was rotated 90
PBGA Package Dimensions for Coplanarity Changed from Maximum Value
0.15 mm to Maximum Value of 0.2 mm
Per PCN notification 961, the 304-point 2-layer PBGA package dimensions for symbol aaa,
coplanarity, are changed from maximum value 0.15 mm to maximum value 0.2 mm.
PCI Configuration Space Registers have changed.
Pin 1 Designator Change
Viewing the text label printed on top of the 21154AE/BE package (marking side), the Pin 1
designator appears in the lower left hand corner of the package. The Pin 1 designator for previous
steppings was located in the upper left hand corner of the package.
Power Management Capability Change
The pmeena_l pin was changed on the 21154AE/BE to indicate that devices on the secondary side
of the bridge do not support the PME# pin. It is up to the software then to scan the device to
actually determine PME# pin support. This is described in
a.
Register Changes
Power Management Capability Changes
Pin Number
Previous Name
Previous Function
New Name
Function
Operation
Vdd
Vss
00000 indicates that the device behind the bridge does not support PME#.
Description
Revision ID
Vendor ID
Device ID
Register
Vdd
Power Input
pmeena_l
This can be tied to either Vdd or Vss (ground). This effects the value of bits [31:27],
PME_SUP, of the Power Management Register (dword address DCh, offset DEh).
D11
Input
These 5 bits should read a 00000
These 5 bits should read as 11111.
Offset
00:01
02:03
08
21154 PCI-to-PCI Bridge Specification Update
a
, as in previous steppings.
Value
Table 2
Old Value
1011h
0026h
that follows:
05h
New Value
B154h
8086h
00h
o
.

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