PSMN006-20K NXP Semiconductors, PSMN006-20K Datasheet
PSMN006-20K
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PSMN006-20K Summary of contents
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... PSMN006-20K N-channel TrenchMOS SiliconMAX ultra low level FET Rev. 01 — 17 November 2009 1. Product profile 1.1 General description SiliconMAX ultra low level N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. ...
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... T ≤ 150 ° ° 4.5 V; see Figure ≤ 10 µs; pulsed; see °C; t Figure °C; see Figure °C sp ≤ 10 µs; pulsed ° Rev. 01 — 17 November 2009 PSMN006-20K Graphic symbol mbb076 4 Version SOT96-1 Min Max - 20 -10 10 and 8.3 - 150 -55 150 - 7.5 ...
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... Product data sheet N-channel TrenchMOS SiliconMAX ultra low level FET 03aa25 120 P der (%) 150 200 0 T (°C) sp Fig 2. Normalized total power dissipation as a function of solder point temperature DC 1 Rev. 01 — 17 November 2009 PSMN006-20K 03aa17 50 100 150 200 T (°C) sp 03ai63 µ 100 (V) DS © ...
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... Transient thermal impedance from junction to solder point as a function of pulse duration PSMN006-20K_1 Product data sheet N-channel TrenchMOS SiliconMAX ultra low level FET Conditions mounted on a metal clad board; see Figure 4 −2 − Rev. 01 — 17 November 2009 PSMN006-20K Min Typ Max - - 15 03ai62 t p δ ...
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... DS GS see Figure MHz see Figure Ω 4 Ω °C G(ext °C; see Figure /dt = -70 A/µ ° Rev. 01 — 17 November 2009 PSMN006-20K Min Typ Max Figure 8 0. Figure 8 0.4 0 0 100 - 10 100 Figure 9 - 4.8 5.7 Figure 10 - 5.7 8.2 Figure ° ° ...
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... V GS(th) (V) 0.8 0.6 typ 0.4 0.2 0 −80 0 (V) GS Fig 8. Gate-source threshold voltage as a function of junction temperature Rev. 01 — 17 November 2009 PSMN006-20K 03ai66 > DSon 150 ° ° C 0.4 0.8 1.2 V (V) GS 03ai71 typ min 0 80 160 ( ° C) ...
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... Fig 10. Normalized drain-source on-state resistance factor as a function of junction temperature 03ai69 (pF (nC) G Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values Rev. 01 — 17 November 2009 PSMN006-20K 03af18 0 60 120 T (°C) j 03ai68 C iss C oss C rss − (V) DS © NXP B.V. 2009. All rights reserved. ...
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... Fig 13. Source current as a function of source-drain voltage; typical values PSMN006-20K_1 Product data sheet N-channel TrenchMOS SiliconMAX ultra low level FET ( 150 ° 0.2 0.4 0.6 0.8 Rev. 01 — 17 November 2009 PSMN006-20K 03ai67 25 ° (V) SD © NXP B.V. 2009. All rights reserved ...
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... 0.49 0.25 5.0 4.0 6.2 1.27 0.36 0.19 4.8 3.8 5.8 0.019 0.0100 0.20 0.16 0.244 0.05 0.041 0.014 0.0075 0.19 0.15 0.228 REFERENCES JEDEC JEITA MS-012 Rev. 01 — 17 November 2009 PSMN006-20K θ detail 1.0 0.7 1.05 0.25 0.25 0.1 0.4 ...
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... Revision history Table 7. Revision history Document ID Release date PSMN006-20K_1 20091117 PSMN006-20K_1 Product data sheet N-channel TrenchMOS SiliconMAX ultra low level FET Data sheet status Change notice Product data sheet - Rev. 01 — 17 November 2009 PSMN006-20K Supersedes - © NXP B.V. 2009. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 17 November 2009 PSMN006-20K © NXP B.V. 2009. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 17 November 2009 Document identifier: PSMN006-20K_1 ...