PI7C8154BNA Pericom Semiconductor, PI7C8154BNA Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/5/521/pericom_semiconductor_sml.jpg)
PI7C8154BNA
Manufacturer Part Number
PI7C8154BNA
Description
Manufacturer
Pericom Semiconductor
Datasheet
1.PI7C8154BNA.pdf
(111 pages)
Specifications of PI7C8154BNA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
85C
Package Type
BGA
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C8154BNAE
Manufacturer:
PERICOM
Quantity:
20 000
06-0008
TABLE OF CONTENTS
LIST OF TABLES...............................................................................................................................................10
LIST OF FIGURES.............................................................................................................................................10
INTRODUCTION ...............................................................................................................................................11
1
2
1.1
1.2
1.3
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
SIGNAL DEFINITIONS ...........................................................................................................................12
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
1.2.6
1.2.7
1.2.8
1.2.9
SIGNAL DEFINITIONS ...........................................................................................................................23
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
2.6.6
2.7.1
2.7.2
2.7.3
2.7.4
2.7.5
2.7.6
2.7.7
2.8.1
2.8.2
2.8.3
2.8.4
2.9.1
2.9.2
2.9.3
2.9.4
2.9.5
SIGNAL TYPES ................................................................................................................................12
SIGNALS ...........................................................................................................................................12
PIN LIST ............................................................................................................................................20
TYPES OF TRANSACTIONS...........................................................................................................23
SINGLE ADDRESS PHASE .............................................................................................................24
DUAL ADDRESS PHASE ................................................................................................................24
DEVICE SELECT (DEVSEL#) GENERATION...............................................................................24
DATA PHASE ...................................................................................................................................24
WRITE TRANSACTIONS ................................................................................................................25
READ TRANSACTIONS ..................................................................................................................28
CONFIGURATION TRANSACTIONS ............................................................................................31
64-BIT OPERATION.........................................................................................................................35
PRIMARY BUS INTERFACE SIGNALS ........................................................................................12
PRIMARY BUS INTERFACE SIGNALS – 64-BIT EXTENSION ...................................................14
SECONDARY BUS INTERFACE SIGNALS ..................................................................................15
SECONDARY BUS INTERFACE SIGNALS – 64-EXTENSTION..................................................17
CLOCK SIGNALS..........................................................................................................................17
MISCELLANEOUS SIGNALS........................................................................................................18
GENERAL PURPOSE I/O INTERFACE SIGNALS.......................................................................19
JTAG BOUNDARY SCAN SIGNALS .............................................................................................19
POWER AND GROUND ...............................................................................................................19
MEMORY WRITE TRANSACTIONS .............................................................................................25
MEMORY WRITE AND INVALIDATE..........................................................................................26
DELAYED WRITE TRANSACTIONS ............................................................................................26
WRITE TRANSACTION ADDRESS BOUNDARIES......................................................................27
BUFFERING MULTIPLE WRITE TRANSACTIONS ....................................................................27
FAST BACK-TO-BACK TRANSACTIONS ....................................................................................28
PREFETCHABLE READ TRANSACTIONS ..................................................................................28
NON-PREFETCHABLE READ TRANSACTIONS.........................................................................28
READ PREFETCH ADDRESS BOUNDARIES .............................................................................29
DELAYED READ REQUESTS.......................................................................................................29
DELAYED READ COMPLETION ON TARGET BUS ..................................................................30
DELAYED READ COMPLETION ON INITIATOR BUS ..............................................................30
FAST BACK-TO-BACK TRANSACTIONS ....................................................................................31
TYPE 0 ACCESS TO PI7C8154A ..................................................................................................32
TYPE 1 TO TYPE 0 CONFIGURATION .......................................................................................32
TYPE 1 TO TYPE 1 FORWARDING .............................................................................................34
SPECIAL CYCLES.........................................................................................................................34
64-BIT AND 32-BIT TRANSACTIONS INITIATED BY PI7C8154B .............................................35
64-BIT TRANSACTIONS – ADDRESS PHASE .............................................................................35
64-BIT TRANSACTIONS – DATA PHASE ....................................................................................36
64-BIT TRANSACTIONS – RECEIVED BY PI7C8154B ...............................................................36
64-BIT TRANSACTIONS – SUPPORT DURING RESET..............................................................37
Page 5 of 111
MARCH 2006 REVISION 1.12
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
PI7C8154B