MT46H32M16LFBF-6 AT:C Micron Technology Inc, MT46H32M16LFBF-6 AT:C Datasheet - Page 76

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MT46H32M16LFBF-6 AT:C

Manufacturer Part Number
MT46H32M16LFBF-6 AT:C
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46H32M16LFBF-6 AT:C

Lead Free Status / Rohs Status
Supplier Unconfirmed
Figure 37: Random WRITE Cycles
PDF: 09005aef83dd2b3e
t67m_512mb_mobile_lpddr.pdf - Rev. E 6/11 EN
Command
Address
DQ
DQS
CK#
DM
CK
3,4
Notes:
WRITE
Bank,
Col b
T0
1,2
1. Each WRITE command can be to any bank.
2. Programmed BL = 2, 4, 8, or 16 in cases shown.
3. D
4. b' (or x, n, a, g) = the next data-in following D
t
DQSS (NOM)
med burst order.
IN
b (or x, n, a, g) = data-in for column b (or x, n, a, g).
WRITE
Bank,
Col x
D
T1
b
IN
1,2
T1n
D
b’
IN
WRITE
Bank,
Col n
T2
D
x
IN
1,2
76
T2n
D
x’
IN
512Mb: x16, x32 Mobile LPDDR SDRAM
WRITE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank,
Col a
T3
D
n
IN
1,2
T3n
D
Don’t Care
n’
IN
IN
b (x, n, a, g) according to the program-
WRITE
Bank,
Col g
T4
D
a
IN
1,2
T4n
D
a’
IN
Transitioning Data
© 2009 Micron Technology, Inc. All rights reserved.
WRITE Operation
NOP
D
T5
g
IN
T5n
D
g’
IN

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