MT46H32M16LFBF-6 AT:C Micron Technology Inc, MT46H32M16LFBF-6 AT:C Datasheet - Page 30
MT46H32M16LFBF-6 AT:C
Manufacturer Part Number
MT46H32M16LFBF-6 AT:C
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT46H32M16LFBF-6_ATC.pdf
(96 pages)
Specifications of MT46H32M16LFBF-6 AT:C
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PDF: 09005aef83dd2b3e
t67m_512mb_mobile_lpddr.pdf - Rev. E 6/11 EN
23. The refresh period equals 64ms. This equates to an average refresh rate of 7.8125μs.
24. For the automotive temperature parts,
25. This is not a device limit. The device will operate with a negative value, but system per-
26. It is recommended that DQS be valid (HIGH or LOW) on or before the WRITE command.
27. The maximum limit for this parameter is not a device limit. The device will operate with
28. At least 1 clock cycle is required during
29. Clock must be toggled a minimum of two times during the
formance could be degraded due to bus turnaround.
The case shown (DQS going from High-Z to logic low) applies when no WRITEs were pre-
viously in progress on the bus. If a previous WRITE was in progress, DQS could be HIGH
during this time, depending on
a greater value for this parameter, but system performance (bus turnaround) will de-
grade accordingly.
Electrical Specifications – AC Operating Conditions
30
512Mb: x16, x32 Mobile LPDDR SDRAM
t
DQSS.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
t
REF =
WR time when in auto precharge mode.
t
REF/2 and
t
REFI =
t
XSR period.
© 2009 Micron Technology, Inc. All rights reserved.
t
REFI/2.
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