W83627EG Nuvoton Technology Corporation of America, W83627EG Datasheet - Page 182

• Manufacturer Part Number: W83627EG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627EG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 3: Read/Write
Bit 2: Read/Write
Bit 1: Read only
Bit 0: Read only
10.3.11 ECP Pin Descriptions
NStrobe (HostClk)
PD<7:0>
NAME
1
0
1
0
0
1
0
1
Enables DMA.
Disables DMA unconditionally.
Disables DMA and all of the service interrupts. Writing a logical 1 to this bit does not
cause an interrupt.
Enables one of the following cases of interrupts. When one of the serviced interrupts
occurs, this bit is set to logical 1 by the hardware. This bit must be reset to logical 0
to re-enable the interrupts.
(a) dmaEn = 1: During DMA, this bit is set to logical 1 when terminal count is
reached.
(b) dmaEn = 0, direction = 0: This bit is set to logical 1 whenever there are writeIntr
threshold or more bytes free in the FIFO.
(c) dmaEn = 0, direction = 1: This bit is set to logical 1 whenever there are readIntr
threshold or more valid bytes to be read from the FIFO.
The FIFO has at least one free byte.
The FIFO is completely full; it cannot accept another byte.
The FIFO contains at least one byte of data.
The FIFO is completely empty.
TYPE
I/O
O
This pin loads data or address into the slave on its asserting edge
during write operations. This signal handshakes with Busy.
These signals contain address, data or RLE data.
W83627EHF/EF, W83627EHG/EG
-171-
DESCRIPTION
Publication Release Date: April 7, 2009
Version 1.94