W83627EG Nuvoton Technology Corporation of America, W83627EG Datasheet - Page 153

• Manufacturer Part Number: W83627EG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627EG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

HIGHDENS# (Bit 0):
0
1
In PS/2 Model 30 mode, the bit definitions are as follows:
DSKCHG (Bit 7):
This bit indicates the status of the DSKCHG# input.
Bit 6-4: These bits are always a logic 0 during a read.
DMAEN (Bit 3):
This bit indicates the value of DO register, bit 3.
NOPREC (Bit 2):
This bit indicates the value of the NOPREC bit in the CC REGISTER.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC. See DR register bits 1 and 0 (Data Rate Register (DR
Register) (Write base address + 4)) for how the settings correspond to individual data rates.
8.2.9
This register is used to control the data rate. In PC/AT and PS/2 mode, the bit definitions are as follows:
Configuration Control Register (CC Register) (Write base address + 7)
500 KB/S or 1 MB/S data rate (high-density FDD)
250 KB/S or 300 KB/S data rate
7
6
0
5
0
0
4
W83627EHF/EF, W83627EHG/EG
3
- 142 -
2
1
0
DSKCHG#
DRATE0
DRATE1
NOPREC
DMAEN