W83627EG Nuvoton Technology Corporation of America, W83627EG Datasheet - Page 160

• Manufacturer Part Number: W83627EG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627EG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 1: OER. This bit is set to logical 1 to indicate that the received data have been overwritten by the
Bit 0: RDR. This bit is set to logical 1 to indicate that the received data are ready to be read by the CPU
9.2.3
This register controls pins used with handshaking peripherals such as modems and also controls the
diagnostic mode of the UART.
Bit 4: When this bit is set to logical 1, the UART enters diagnostic mode, as follows:
DTR (bit 0 of HCR)→DSR#, RTS (bit 1 of HCR) →CTS#, Loopback RI input (bit 2 of HCR) → RI# and
IRQ enable (bit 3 of HCR) →DCD#.
Bit 3: The UART interrupt output is enabled by setting this bit to logical 1. In diagnostic mode, this bit is
Bit 2: This bit is only used in the diagnostic mode. In diagnostic mode, this bit is internally connected to
Bit 1: This bit controls the RTS# output. The value of this bit is inverted and output to RTS#.
Bit 0: This bit controls the DTR# output. The value of this bit is inverted and output to DTR#.
Aside from the above connections, the UART operates normally. This method allows the CPU to
test the UART in a convenient way.
next received data before they were read by the CPU. In 16550 mode, it indicates the same
condition, instead of FIFO full. When the CPU reads USR, it sets this bit to logical 0.
in the RBR or FIFO. When no data are left in the RBR or FIFO, the bit is set to logical 0.
(1) SOUT is forced to logical 1, and SIN is isolated from the communication link.
(2) The modem output pins are set to their inactive state.
(3) The modem input pins are isolated from the communication link and connect internally as
internally connected to the modem control input DCD#.
the modem control input RI#.
Handshake Control Register (HCR) (Read/Write)
7
0
6
0
5
0
4
3
2
W83627EHF/EF, W83627EHG/EG
1
-149-
0
Data terminal ready (DTR)
Request to send (RTS)
Loopback RI input
IRQ enable
Internal loopback enable
Publication Release Date: April 7, 2009
Version 1.94