PI7C8150AMAE Pericom Semiconductor, PI7C8150AMAE Datasheet - Page 97

• Manufacturer Part Number: PI7C8150AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 208-FQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 208-FQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

06-0057
14.1.53
14.1.54
14.1.55
15
POWER MANAGEMENT DATA REGISTER – OFFSET E0h
CAPABILITY ID REGISTER – OFFSET E4h
NEXT POINTER REGISTER – OFFSET E4h
BRIDGE BEHAVIOR
A PCI cycle is initiated by asserting the FRAME_L signal. In a bridge, there are a number
of possibilities. Those possibilities are summarized in the table below:
Bit
1:0
7:2
8
12:9
14:13
15
Bit
7:0
Bit
15:8
Function
Power State
Reserved
PME# Enable
Data Select
Data Scale
PME status
Function
Capability ID
Function
Next Pointer
Type
R/W
R/O
R/O
R/O
R/O
R/O
Type
R/O
Type
R/O
Page 97 of 111
Description
Indicates the current power state of PI7C8150A. If an
unimplemented power state is written to this register, PI7C8150A
completes the write transaction, ignores the write data, and does not
change the value of the field. Writing a value of D0 when the
previous state was D3 cause a chip reset without asserting
S_RESET_L
00: D0 state
01: not implemented
10: not implemented
11: D3 state
Reset to 0
Read as 0
Read as 0 as PI7C8150A does not support the PME# pin.
Read as 0 as the data register is not implemented.
Read as 0 as the data register is not implemented.
Read as 0 as the PME# pin is not implemented.
Description
00h: Reserved.
01h: PCI Power Management (PCIPM)
02h: Accelerated Graphics Port (AGP)
03h: Vital Product Data (VPD)
04h: Slot Identification (SI)
05h: Message Signaled Interrupts (MSI)
06h: Compact PCI Hot Swap
07h-255h: Reserved
Description
End of pointer (00h)
2-PORT PCI-TO-PCI BRIDGE
APRIL 2006 – Revision 1.1
PI7C8150A