PI7C8150AMAE Pericom Semiconductor, PI7C8150AMAE Datasheet - Page 9

• Manufacturer Part Number: PI7C8150AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 208-FQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 208-FQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

06-0057
18
LIST OF TABLES
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LIST OF FIGURES
F
F
F
F
F
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
18.1
18.2
18.3
2-1. P
2-2. P
3-1. PCI T
3-2. W
3-3. W
3-4. R
3-5. R
3-6. D
3-7. D
3-8. R
3-9. R
5-1. S
6-1. S
6-2. S
6-3. S
6-4. S
6-5. A
6-6. A
6-7. A
10-1. GPIO O
10-2. GPIO S
11-1. P
16-1. TAP P
16-2. JTAG B
PACKAGE INFORMATION............................................................................ 109
8-1
16-1
17-1
18-1
18-2
208-PIN FQFP PACKAGE DIAGRAM ................................................................................ 109
256-BALL PBGA PACKAGE DIAGRAM ........................................................................... 110
PART NUMBER ORDERING INFORMATION.................................................................. 110
IN
IN
UMMARY OF
ETTING THE
ETTING
ETTING
ETTING
EAD
EAD
ESPONSE TO
ESPONSE TO
EVICE
ELAYED
SSERTION OF
SSERTION OF
SSERTION OF
S
RITE
RITE
OWER
T
PCI S
208-
256-
ECONDARY
L
L
EST
RANSACTIONS
IST
IST
P
T
T
T
REFETCH
RANSACTION
PIN
PIN
INS
N
RANSACTION
RANSACTION
A
– 208-
– 256-
M
S
P
S
ERIAL
IGNAL
PERATION
OUNDARY
UMBER TO
W
ECONDARY
RIMARY
ECONDARY
CCESS
ANAGEMENT
FQFP P
PBGA P
.............................................................................................................................. 101
RITE
P
P
D
T
RIMARY
P_PERR_L........................................................................................................ 60
S_PERR_L........................................................................................................ 61
P_SERR_L
A
OSTED
PIN
PIN
D
RANSACTION
ELAYED
T
RBITER
A
ATA
P
IMING
T
ORT
DDRESS
I
FQFP .......................................................................................................... 18
PBGA ......................................................................................................... 20
ARGET
ACKAGE
................................................................................................................... 22
NTERFACE
................................................................................................................... 71
R
ACKAGE
IDSEL S_AD P
P
F
EGISTER
F
D
I
I
W
REFETCHING
NTERFACE
NTERFACE
B
I
ORMAT
ORWARDING
M
ISCONNECT
R
NTERFACE
T
E
RITE
LOCK
RANSITIONS
XAMPLE
EAD
EASUREMENT
T
B
FOR
ERMINATION
O
OUNDARIES
O
O
T
UTLINE
T
M
.................................................................................................. 71
O
D
RDERING
UTLINE
ARGET
D
ARGET
RDER
IAGRAM
ASTER
ATA
D
M
............................................................................................ 67
Page 9 of 111
D
.......................................................................................... 28
ETECTED
A
ASTER
......................................................................................... 23
IN
ETECTED
..................................................................................... 109
DDRESS
P
...................................................................................... 73
.................................................................................... 103
.................................................................................... 110
T
T
M
ARITY
D
ERMINATION
................................................................................... 50
C
.................................................................................. 28
ERMINATION
R
............................................................................... 100
APPING
ATA
ONDITIONS
ESPONSE
D
ATA
P
B
E
P
P
ARITY
OUNDARIES
ARITY
RRORS
ARITY
..................................................................... 32
P
ARITY
................................................................. 37
............................................................... 38
E
............................................................ 107
............................................................. 38
E
E
RROR
............................................................ 61
RROR
RROR
E
RROR
.................................................... 26
B
2-PORT PCI-TO-PCI BRIDGE
D
B
IT
IT
ETECTED
............................................ 59
D
APRIL 2006 – Revision 1.1
.......................................... 58
ETECTED
B
IT
B
......................... 59
IT
.................... 60
PI7C8150A