PI7C8150AMAE Pericom Semiconductor, PI7C8150AMAE Datasheet - Page 89

• Manufacturer Part Number: PI7C8150AMAE
• Description: IC PCI-PCI BRIDGE 2PORT 208-FQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150AMAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 208-FQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

06-0057
14.1.32
14.1.33
14.1.34
UPSTREAM MEMORY CONTROL REGISTER – OFFSET 48h
SECONDARY BUS ARBITER PREEMPTION CONTROL
REGISTER – OFFSET 4Ch
UPSTREAM (S TO P) MEMORY BASE REGISTER – OFFSET 50h
Bit
16
31:17
Bit
31:28
Bit
3:0
15:4
Function
Upstream (S to
P) Memory Base
and Limit Enable
Reserved
Function
Secondary bus
arbiter
preemption
control
Function
64 bit addressing
Upstream
Memory Base
Address
Type
R/W
R/O
Type
R/W
Type
R/O
R/W
Page 89 of 111
Description
0: Upstream memory is the entire range except the down stream
memory channel
1: Upstream memory is confined to upstream Memory Base and
Limit (See offset 50
Reset to 0
Reserved. Returns 0 when read. Reset to 0
Description
Controls the number of clock cycles after frame is asserted before
preemption is enabled.
1xxx: Preemption off
0000: Preemption enabled after 0 clock cycles
0001: Preemption enabled after 1 clock cycle
0010: Preemption enabled after 2 clock cycles
0011: Preemption enabled after 4 clock cycles
0100: Preemption enabled after 8 clock cycles
0101: Preemption enabled after 16 clock cycles
0110: Preemption enabled after 32 clock cycles
0111: Preemption enabled after 64 clock cycles
Reset to 0000
Description
0: 32 bit addressing
1: 64 bit addressing
Reset to 1
Controls upstream memory base address.
Reset to 00000000h
th
and 54
th
2-PORT PCI-TO-PCI BRIDGE
for upstream memory range)
APRIL 2006 – Revision 1.1
PI7C8150A