LM93CIMT/NOPB National Semiconductor, LM93CIMT/NOPB Datasheet - Page 75

IC HARDWARE MONITOR 56-TSSOP

LM93CIMT/NOPB

Manufacturer Part Number
LM93CIMT/NOPB
Description
IC HARDWARE MONITOR 56-TSSOP
Manufacturer
National Semiconductor
Datasheet

Specifications of LM93CIMT/NOPB

Applications
Monitors
Interface
2-Wire SMBus
Voltage - Supply
3 V ~ 3.6 V
Package / Case
56-TSSOP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*LM93CIMT
*LM93CIMT/NOPB
LM93CIMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM93CIMT/NOPB
Manufacturer:
Intersil
Quantity:
169
Register
Address
Register
Address
16.0 Registers
16.8.19 Register CEh PWM2 Control 3
Bits 7:5 configure the spin-up duration. When the duty cycle of PWM2 changes from zero to a non-zero value, the spin-up
sequence is activated for the specified amount of time. The available settings are defined according to this table:
16.8.20 Register CFh Special Function PWM2 Control 4
CFh
CEh
Read/
Write
R/W
Read/
Write
R/W
3:0
7:5
2:0
7:3
Bit
Bit
4
Special Function
Control 3
Register
PWM2
(Continued)
Name
Control 4
Register
PWM2
Name
SU_DUR
SU_DC
FREQ2
Name
Name
RES
RES
Bit 7
SU_DUR
Bit 7
0h
1h
2h
3h
4h
5h
6h
7h
RES
R/W
R/W
R/W
R/W
R/W
SU_DUR
R
R
Bit 6
Bit 6
RES
This field sets the duty cycle that used whenever
PWM2 experiences a Spin-Up cycle. This field
accepts 16 possible values that are mapped to duty
cycles according the table in the Auto-Fan Control
section. Setting this field to 0h effectively disables
Spin-Up.
Reserved
Sets the Spin-Up duration for PWM2.
PWM2 frequency control. Controls the frequency of
the PWM2 output in the same fashion as FREQ1 in
the PWM1 Control 4 register.
Reserved
Bit 5
75
Bit 5
RES
Bit 4
Spin-up disabled
RES
Spin-Up Time
Bit 4
RES
1000 ms
2000 ms
4000 ms
100 ms
250 ms
400 ms
700 ms
Description
Description
Bit 3
Bit 3
RES
Bit 2
Bit 2
SU_DC
Bit 1
FREQ2
Bit 1
Bit 0
Bit 0
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Default
Default
Value
Value
00h
00h

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