LM93CIMT/NOPB National Semiconductor, LM93CIMT/NOPB Datasheet - Page 42

• Manufacturer Part Number: LM93CIMT/NOPB
• Description: IC HARDWARE MONITOR 56-TSSOP
• Manufacturer: National Semiconductor

Specifications of LM93CIMT/NOPB

• Applications: Monitors
• Interface: 2-Wire SMBus
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 56-TSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM93CIMT; *LM93CIMT/NOPB; LM93CIMT

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Register
Address
Register
Address
Bit
Bit
16.0 Registers
16.4.2 Register 41h B_Error Status 2
16.4.3 Register 42h B_Error Status 3
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
42h
41h
AD1_ERR
AD2_ERR
AD3_ERR
AD4_ERR
AD5_ERR
AD6_ERR
AD7_ERR
AD8_ERR
AD9_ERR
AD10_ERR
AD11_ERR
AD12_ERR
AD13_ERR
AD14_ERR
AD15_ERR
AD16_ERR
Read/
Name
Write
RWC
Name
Read/
Write
RWC
Register
Status 3
B_Error
Name
Register
Status 2
B_Error
Name
RWC This bit is set when the AD_IN1 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN2 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN3 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN4 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN5 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN6 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN7 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN8 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN9 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN10 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN11 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN12 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN13 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN14 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN15 voltage has fallen outside the range defined
RWC This bit is set when the AD_IN16 voltage has fallen outside the range defined
R/W
R/W
(Continued)
by the AD_IN1 Low Limit and the AD_IN1 High Limit registers.
by the AD_IN2 Low Limit and the AD_IN2 High Limit registers.
by the AD_IN3 Low Limit and the AD_IN3 High Limit registers.
by the AD_IN4 Low Limit and the AD_IN4 High Limit registers.
by the AD_IN5 Low Limit and the AD_IN5 High Limit registers.
by the AD_IN6 Low Limit and the AD_IN6 High Limit registers.
by the AD_IN7 Low Limit and the AD_IN7 High Limit registers.
by the AD_IN8 Low Limit and the AD_IN8 High Limit registers.
by the AD_IN9 Low Limit and the AD_IN9 High Limit registers.
by the AD_IN10 Low Limit and the AD_IN10 High Limit registers.
by the AD_IN11 Low Limit and the AD_IN11 High Limit registers.
by the AD_IN12 Low Limit and the AD_IN12 High Limit registers.
by the AD_IN13 Low Limit and the AD_IN13 High Limit registers.
by the AD_IN14 Low Limit and the AD_IN14 High Limit registers.
by the AD_IN15 Low Limit and the AD_IN15 High Limit registers.
by the AD_IN16 Low Limit and the AD_IN16 High Limit registers.
ADIN16
_ERR
Bit 7
ADIN8
_ERR
Bit 7
ADIN15
_ERR
Bit 6
ADIN7
_ERR
Bit 6
ADIN14
_ERR
ADIN6
Bit 5
_ERR
Bit 5
42
Description
Description
ADIN13
ADIN5
_ERR
_ERR
Bit 4
Bit 4
ADIN12
ADIN4
_ERR
_ERR
Bit 3
Bit 3
ADIN3
ADIN11
_ERR
Bit 2
_ERR
Bit 2
ADIN2
_ERR
ADIN10
Bit 1
_ERR
Bit 1
ADIN1
_ERR
Bit 0
ADIN9
_ERR
Bit 0
S3*, S4/5*
S3*, S4/5*
S3*, S4/5*
Masking
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
Masking
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
Sleep
Sleep
none
Default
Default
Value
Value
00h
00h