LM93CIMT/NOPB National Semiconductor, LM93CIMT/NOPB Datasheet - Page 49

• Manufacturer Part Number: LM93CIMT/NOPB
• Description: IC HARDWARE MONITOR 56-TSSOP
• Manufacturer: National Semiconductor

Specifications of LM93CIMT/NOPB

• Applications: Monitors
• Interface: 2-Wire SMBus
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 56-TSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM93CIMT; *LM93CIMT/NOPB; LM93CIMT

Register
Address
Bit
16.0 Registers
16.5.5 Register 4Ch H_P1_PROCHOT Error Status
The PH1_ERR bit is the only bit in this register that will set HOST_ ERR in the LM93 Status/Control register.
0
1
2
3
4
5
6
7
4Ch
T0
T12
T25
T50
T75
T100
TMAX
PH1_ERR
Name
Read/
Write
RWC
H_P1_PROCHOT
Error Status
RWC Set when P1_PROCHOT has had a throttled event. This bit is set for any
RWC Set when P1_PROCHOT has throttled greater than or equal to 0.00% but
RWC Set when P1_PROCHOT has throttled greater than or equal to 12.5% but
RWC Set when P1_PROCHOT has throttled greater than or equal to 25% but less
RWC Set when P1_PROCHOT has throttled greater than or equal to 50% but less
RWC Set when P1_PROCHOT has throttled greater than or equal to 75% but less
RWC Set when P1_PROCHOT has throttled 100%.
RWC Set when P1_PROCHOT has throttled more than the user limit.
R/W
Register
(Continued)
Name
amount of PROCHOT throttling
less than 12.5%.
less than 25%.
than 50%.
than 75%.
than 100%.
PH1_ERR
Bit 7
TMAX
Bit 6
49
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Description
0%.
T100
Bit 5
Bit 4
T75
Bit 3
T50
Bit 2
T25
Bit 1
T12
Bit 0
T0
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Masking
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
S3, S4/5
Sleep
Default
Value
00h