NCT6627UD Nuvoton Technology Corporation of America, NCT6627UD Datasheet - Page 139

• Manufacturer Part Number: NCT6627UD
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of NCT6627UD

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Modes 000 (SPP) and 001 (PS/2) (Data Port)
During a write operation, the Data Register latches the contents of the data bus on the rising edge of the input,
and the contents of this register are output to PD0-PD7. During a read operation, ports PD0-PD7 are read and
output to the host. The bit definitions are as follows:
Mode 011 (ECP FIFO-Address/RLE)
A data byte written to this address is placed in the FIFO and tagged as an ECP Address/RLE. The hardware at
the ECP port transmits this byte to the peripheral automatically. This operation is defined only for the forward
direction. The bit definitions are as follows:
These bits are logical 0 during a read of the Printer Status Register. The bits of this status register are defined as
follows:
The bit definitions are as follows:
DEFAULT
BIT
NAME
NAME
2-0
NAME
NAME
11.3.2
11.3.3
11.3.4
7
6
5
4
3
BIT
BIT
BIT
BIT
nBusy. This bit reflects the complement of the Busy input.
nAck. This bit reflects the nAck input.
Perror. This bit reflects the Perror input.
Select. This bit reflects the Select input.
nFault. This bit reflects the nFault input.
These three bits are not implemented and are always logical 1 during a read.
Data and ecpAFifo Port
Device Status Register (DSR)
Device Control Register (DCR)
Address/RLE
nBusy
PD7
7
7
7
1
7
nAck
PD6
6
6
6
1
6
Director
Perror
PD5
NA
5
5
5
5
ackInEn
DESCRIPTION
Select
PD4
NA
4
4
4
4
Address or RLE
SelectIn
nFault
-130-
PD3
NA
3
3
3
3
W83627UHG/NCT6627UD
nInit
PD2
NA
Publication Release Date: October 26, 2010
2
2
1
2
2
Autofd
PD1
NA
1
1
1
1
1
Strobe
PD0
NA
0
0
0
1
0
Revision 1.7