NCT6627UD Nuvoton Technology Corporation of America, NCT6627UD Datasheet - Page 136

• Manufacturer Part Number: NCT6627UD
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of NCT6627UD

• Lead Free Status / Rohs Status: Supplier Unconfirmed

These four registers are available only in EPP mode. The bit definitions for each data port are the same and as
follows:
When any EPP data port is accessed, the contents of DB0-DB7 are buffered (non-inverting) and output to ports
PD0-PD7 during a write operation. The leading edge of IOW# causes an EPP data write cycle to be performed
and the trailing edge of IOW# latches the data for the duration of the EPP write cycle.
During a read operation, ports PD0-PD7 are read, and the leading edge of IOR# causes an EPP read cycle to be
performed and the data to be output to the host CPU.
11.2.7 EPP Operation
When EPP mode is selected, the PDx bus is in standard or bi-directional mode when no EPP read, write, or
address cycle is being executed. In this situation, all output signals are set by the SPP Control Port and the
direction is controlled by DIR of the Control Port.
A watchdog timer is required to prevent system lockup. The timer indicates that more than 10 μS have elapsed
from the start of the EPP cycle to the time WAIT# is deasserted. The current EPP cycle is aborted when a time-
out occurs. The time-out condition is indicated in status bit 0.
The EPP operates on a two-phase cycle. First, the host selects the register within the device for subsequent
operations. Second, the host performs a series of read and/or write byte operations to the selected register. Four
operations are supported on the EPP: Address Write, Data Write, Address Read, and Data Read. All operations
on the EPP device are performed asynchronously.\
Nwrite
PD<7:0>
Intr
Nwait
PE
Select
NDStrb
Nerror
Ninits
NAStrb
EPP NAME
NAME
BIT
13. EPP Pin Descriptions
PD7
7
TYPE
I/O
O
O
O
O
I
I
I
I
I
Denotes read or write operation for address or data.
Bi-directional EPP address and data bus.
Used by peripheral devices to interrupt the host.
Inactivated to acknowledge that data transfer is complete. Activated to
indicate that the device is ready for the next transfer.
Paper end; same as SPP mode.
Printer-select status; same as SPP mode.
This signal is active low. It denotes a data read or write operation.
Error; same as SPP mode.
This signal is active low. When it is active, the EPP device is reset to its
initial operating mode.
This signal is active low. It denotes an address read or write operation.
PD6
6
PD5
5
PD4
4
EPP DESCRIPTION
-127-
PD3
3
W83627UHG/NCT6627UD
PD2
Publication Release Date: October 26, 2010
2
PD1
1
PD0
0
Revision 1.7