NCT6627UD Nuvoton Technology Corporation of America, NCT6627UD Datasheet - Page 114

• Manufacturer Part Number: NCT6627UD
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of NCT6627UD

• Lead Free Status / Rohs Status: Supplier Unconfirmed

In PS/2 Model 30 mode, the bit definitions for this register are as follows:
The Digital Output Register is a write-only register that controls drive motors, drive selection, DRQ/IRQ enable,
and FDC reset. All the bits in this register are cleared by the MR pin. The bit definitions are as follows:
DEFAULT
DEFAULT
9.2.3 Digital Output Register (DO Register) (Write base address + 2)
BIT
NAME
BIT
NAME
1-0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
BIT
BIT
1
1
Drive SEL0. Indicates the status of the DO Register, bit 0 (drive-select bit 0).
WDATA Toggle. Changes state on every rising edge of the WD# output pin.
RDATA Toggle. Changes state on every rising edge of the RDATA# output pin.
WE. Indicates the complement of the WE# output pin.
MOT EN B. Indicates the complement of the MOB# output pin.
MOT EN A. Indicates the complement of the MOA# output pin.
DRV 2#.
0: A second drive has been installed.
1: No second drive is installed.
Reserved.
DSA#. Indicates the status of the DSA# output pin.
WD F/F. Indicates the complement of the WD# output pin, which is latched on every rising
edge of the WD# output pin.
RDATA F/F. Indicates the complement of the latched RDATA# output pin.
WE F/F. Indicates the complement of the latched WE# output pin.
Reserved.
DRV 2#
7
0
7
1
RESERVED.
6
1
6
1
Drive
SEL0
DSA#
5
0
5
1
DESCRIPTION
DESCRIPTION
Toggle
WDTA
WD F/F
4
0
4
0
Toggle
RDTA
RDATA
-105-
3
0
F/F
3
0
W83627UHG/NCT6627UD
WE F/F
WE
Publication Release Date: October 26, 2010
2
0
2
0
MOT EN
DSD#
1
B
0
1
1
MOT EN
DSC#
0
A
0
0
1
Revision 1.7