NCT6627UD Nuvoton Technology Corporation of America, NCT6627UD Datasheet - Page 128

• Manufacturer Part Number: NCT6627UD
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of NCT6627UD

• Lead Free Status / Rohs Status: Supplier Unconfirmed

This register controls pins used with handshaking peripherals such as modems and also controls the diagnostic
mode of the UART.
This register reflects the current state of four input pins used with handshake peripherals such as modems and
records changes on these pins.
DEFAULT
DEFAULT
10.2.3 Handshake Control Register (HCR) (Read/Write)
10.2.4 Handshake Status Register (HSR) (Read/Write)
NAME
BIT
BIT
NAME
7
6
5
4
3
2
1
0
BIT
BIT
0
0
0
Internal Loopback Enable. When this bit is set to logic 1, the UART enters diagnostic
mode, as follows:
(1) SOUT is forced to logic 1, and SIN is isolated from the communication link.
(2) The modem output pins are set to their inactive state.
(3) The modem input pins are isolated from the communication link and connect internally
as DTR (bit 0 of HCR) →DSR#, RTS ( bit 1 of HCR) →CTS#, Loopback RI input ( bit 2 of
HCR) → RI# and IRQ enable ( bit 3 of HCR) →DCD#.
Aside from the above connections, the UART operates normally. This method allows the
CPU to test the UART in a convenient way.
IRQ Enable. The UART interrupt output is enabled by setting this bit to logic 1. In
diagnostic mode, this bit is internally connected to the modem control input DCD#.
Loopback RI Input. This bit is only used in the diagnostic mode. In diagnostic mode, this
bit is internally connected to the modem control input RI#.
RTS (Request to Send). This bit controls the RTS# output. The value of this bit is
inverted and output to RTS#.
DTR (Data Terminal Ready). This bit controls the DTR# output. The value of this bit is
inverted and output to DTR#.
DCD
7
0
NA
7
6
0
NA
RI
6
5
0
DSR
NA
5
LOOPBACK
INTERNAL
ENABLE
DESCRIPTION
DESCRIPTION
4
0
CTS
NA
4
ENABLE
TDCD
IRQ
-119-
NA
3
0
3
W83627UHG/NCT6627UD
LOOPBACK
RI INPUT
FERI
NA
Publication Release Date: October 26, 2010
2
0
2
TDSR
NA
RTS
1
1
0
TCTS
DTR
NA
0
0
0
Revision 1.7