ADDS-BF533-EZLITE Analog Devices Inc, ADDS-BF533-EZLITE Datasheet - Page 46

ADDS-BF533-EZLITE

Manufacturer Part Number
ADDS-BF533-EZLITE
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADDS-BF533-EZLITE

Significant Other Parts
ADV7183 Video Decode
Lead Free Status / Rohs Status
Not Compliant
ADSP-BF531/ADSP-BF532/ADSP-BF533
plus the various output disable times as specified in the
Specifications on Page 24
write cycle as shown in
Capacitive Loading
Output delays and holds are based on standard capacitive loads:
30 pF on all pins (see
(nominal) = 1.8 V or 1.5 V for V
2.5 V/3.3 V.
output rise time varies with capacitance. The delay and hold
specifications given should be derated by a factor derived from
these figures. The graphs in these figures may not be linear out­
side the ranges shown.
Figure 45. Typical Rise and Fall Times (10% to 90%) versus Load Capacitance
16
14
12
10
8
6
4
2
0
OUTPUT
0
Figure 44. Equivalent Device Loading for AC Measurements
(Includes All Fixtures)
PIN
TO
Figure 45
50
for Driver A at V
Figure
through
LOAD CAPACITANCE (pF)
SDRAM Interface Timing on Page
(for example t
100
30pF
44). V
RISE TIME
Figure 56 on Page 48
DDEXT
DDEXT
LOAD
150
50�
= 1.75 V
(nominal) =
FALL TIME
is 0.95 V for V
DSDAT
for an SDRAM
200
V
LOAD
Rev. E | Page 46 of 60 | July 2007
show how
DDEXT
Timing
250
28).
Figure 46. Typical Rise and Fall Times (10% to 90%) versus Load Capacitance
Figure 47. Typical Rise and Fall Times (10% to 90%) versus Load Capacitance
Figure 48. Typical Rise and Fall Times (10% to 90%) versus Load Capacitance
14
12
10
12
10
8
6
4
2
0
8
6
4
2
0
14
12
10
0
0
8
6
4
2
0
0
50
50
50
for Driver A at V
for Driver A at V
for Driver B at V
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
100
100
100
RISE TIME
RISE TIME
RISE TIME
DDEXT
DDEXT
DDEXT
150
= 2.25 V
= 3.65 V
= 1.75 V
150
150
FALL TIME
FALL TIME
FALL TIME
200
200
200
250
250
250