NAND01GR3B2CZA6E Micron Technology Inc, NAND01GR3B2CZA6E Datasheet - Page 41

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NAND01GR3B2CZA6E

Manufacturer Part Number
NAND01GR3B2CZA6E
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of NAND01GR3B2CZA6E

Cell Type
NAND
Density
1Gb
Access Time (max)
25us
Interface Type
Parallel
Boot Type
Not Required
Address Bus
8b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
VFBGA
Program/erase Volt (typ)
1.7 to 1.95V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
1.95V
Word Size
8b
Number Of Words
128M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
63
Lead Free Status / Rohs Status
Compliant

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NAND01G-B2C
8
8.1
8.2
Software algorithms
This section gives information on the software algorithms that Numonyx recommends to
implement to manage the bad blocks and extend the lifetime of the NAND device.
NAND flash memories are programmed and erased by Fowler-Nordheim tunneling using a
high voltage. Exposing the device to a high voltage for extended periods can cause the
oxide layer to be damaged. For this reason, the number of program and erase cycles is
limited (see
algorithms to extend the number of program and erase cycles and increase data retention.
To help integrate a NAND memory into an application, Numonyx can provide a full range of
software solutions: file system, sector manager, drivers and code management.
Contact the nearest Numonyx sales office or visit www.numonyx.com for more details.
Bad block management
Devices with bad blocks have the same quality level and the same AC and DC
characteristics as devices where all the blocks are valid. A bad block does not affect the
performance of valid blocks because it is isolated from the bit line and common source line
by a select transistor.
The devices are supplied with all the locations inside valid blocks erased (FFh). The bad
block information is written prior to shipping. Any block, where the 1st and 6th bytes (x8
device)/1st word (x16 device), in the spare area of the 1st page, does not contain FFh, is a
bad block.
The bad block Information must be read before any erase is attempted as the bad block
information may be erased. For the system to be able to recognize the bad blocks based on
the original information it is recommended to create a bad block table following the flowchart
shown in
NAND flash memory failure modes
Over the lifetime of the device additional bad blocks may develop.
To implement a highly reliable system, all the possible failure modes must be considered:
Refer to
Program/erase failure: in this case the block has to be replaced by copying the data to
a valid block. These additional bad blocks can be identified as attempts to program or
erase them will give errors in the status register
As the failure of a page program operation does not affect the data in other pages in the
same block, the block can be replaced by re-programming the current data and copying
the rest of the replaced block to an available valid block. The Copy Back Program
command can be used to copy the data to a valid block. See
program
Read failure: in this case, ECC correction must be implemented. To efficiently use the
memory space, it is recommended to recover single-bit error in read by ECC, without
replacing the whole block.
Table 17
Figure
Table 18
for more details
18.
for the procedure to follow if an error occurs during an operation.
for value) and it is mandatory to implement error correction code
Section 6.4: Copy back
Software algorithms
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