MM912H634CM1AE Freescale Semiconductor, MM912H634CM1AE Datasheet - Page 89

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MM912H634CM1AE

Manufacturer Part Number
MM912H634CM1AE
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CM1AE

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
4.14.3.3
PWMSCLA is the programmable scale value used in scaling clock A to generate clock SA. Clock SA is generated by taking clock
A, dividing it by the value in the PWMSCLA register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLA)
Note:
4.14.3.4
PWMSCLB is the programmable scale value used in scaling clock B to generate clock SB. Clock SB is generated by taking clock
B, dividing it by the value in the PWMSCLB register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLB).
Freescale Semiconductor
Offset
84.
Reset
.
W
R
(84)
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Clock SA = Clock A / (2 * PWMSCLA)
0x62
Bit 7
PWM Scale A Register (PWMSCLA)
PWM Scale B Register (PWMSCLB)
7
0
PCKB2–0 and PCKA2–0 register bits can be written anytime. If the clock pre-scale is
changed while a PWM signal is being generated, a truncated or stretched pulse can occur
during the transition.
When PWMSCLA = $00, PWMSCLA value is considered a full scale value of 256. Clock A
is thus divided by 512.
Clock SB = Clock B / (2 * PWMSCLB)
When PWMSCLB = $00, PWMSCLB value is considered a full scale value of 256. Clock B
is thus divided by 512.
6
0
PCKA2
6
0
0
0
0
1
1
1
1
Table 125. PWM Scale A Register (PWMSCLA)
Table 124. Clock A Prescaler Selects
MM912_634 Advance Information, Rev. 4.0
5
0
5
PCKA1
0
0
1
1
0
0
1
1
NOTE
NOTE
NOTE
4
0
4
PCKA0
0
1
0
1
0
1
0
1
3
0
3
Value of Clock A
D2D clock / 128
D2D clock / 16
D2D clock / 32
D2D clock / 64
D2D clock / 2
D2D clock / 4
D2D clock / 8
D2D clock
2
0
2
PWM Control Module (PWM8B2C)
1
0
1
Access: User read/write
Bit 0
0
0
89

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