PIC18F6585-I/PT Microchip Technology Inc., PIC18F6585-I/PT Datasheet - Page 254

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PIC18F6585-I/PT

Manufacturer Part Number
PIC18F6585-I/PT
Description
64 PIN, 48 KB FLASH, 3328 RAM, 52 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F6585-I/PT

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
53
Interface
CAN/I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
48K Bytes
Ram Size
3.3K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Quantity
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Part Number:
PIC18F6585-I/PT
Manufacturer:
Microchip Technology
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Part Number:
PIC18F6585-I/PT
Manufacturer:
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Quantity:
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PIC18F6585/8585/6680/8680
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(AV
V
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To oper-
ate in Sleep, the A/D conversion clock must be derived
from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter which generates the result via successive
approximation.
FIGURE 19-1:
DS30491C-page 252
REF
DD
+ and RA2/AN2/V
Note 1: Channels AN15 through AN12 are not available on the PIC18F6X8X.
and AV
2: I/O pins have diode protection to V
SS
Converter
10-bit
) or the voltage level on the RA3/AN3/
A/D
Reference
Voltage
A/D BLOCK DIAGRAM
REF
- pins.
V
V
REF
REF
+
-
(Input Voltage)
VCFG1:VCFG0
DD
V
AIN
and V
SS
.
V
DD
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH/ADRESL
registers, the GO/DONE bit (ADCON0 register) is
cleared and A/D interrupt flag bit ADIF is set. The block
diagram of the A/D module is shown in Figure 19-1.
V
SS
CHS3:CHS0
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
 2004 Microchip Technology Inc.
AN15
AN14
AN13
AN12
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
(1)
(1)
(1)
(1)

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