PEB3086FV14XP Lantiq, PEB3086FV14XP Datasheet - Page 224

PEB3086FV14XP

Manufacturer Part Number
PEB3086FV14XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB3086FV14XP

Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
RBCLB
RBCHB
4.6.9
Value after reset: 00
RBC7-0 ... Receive Byte Count
Eight least significant bits of the total number of bytes in a received message (see
RBCHB register).
4.6.10
Value after reset: 00
OV ... Overflow
A ’1’ in this bit position indicates a message longer than (2
RBC8-11 ... Receive Byte Count
Four most significant bits of the total number of bytes in a received message (see
RBCLB register).
Note: Normally RBCHB and RBCLB should be read by the microcontroller after an RME-
Data Sheet
interrupt in order to determine the number of bytes to be read from the RFIFOB,
and the total message length. The contents of the registers are valid only after an
RME or RPF interrupt, and remain so until the frame is acknowledged via the RMC
bit or RRES.
7
7
RBC7
RBCLB - Receive Frame Byte Count Low B-Channel
RBCHB - Receive Frame Byte Count High B-Channel
0
H
H
0
.
0
OV
224
RBC11
Detailed Register Description
12
- 1) = 4095 bytes .
0
0
RBC0
RBC8
PEB 3086
2003-01-30
ISAC-SX
RD (76)
RD (77)

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