PEB3086FV14XP Lantiq, PEB3086FV14XP Datasheet - Page 102

• Manufacturer Part Number: PEB3086FV14XP
• Manufacturer: Lantiq

Specifications of PEB3086FV14XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Monitoring Data
Figure 53
simultaneously. For monitoring on DU and/or DD the channel registers with even
numbers (CDA10, CDA20) are assigned to time slots with even numbers TS(2n) and the
channel registers with odd numbers (CDA11, CDA21) are assigned to time slots with odd
numbers TS(2n+1). The user has to take care of this restriction by programming the
appropriate time slots..
.
Figure 53
Monitoring TIC Bus
Monitoring the TIC bus (TS11) is handled as a special case. The TIC bus can be
monitored with the registers CDAx0 by setting the EN_TBM (Enable TIC Bus Monitoring)
bit in the control registers CRx. In this special case the TSDPx0 must be set to 08
monitoring from DU or 88
monitor the TIC bus (TS11) and the odd numbered D-channel (TS3) simultaneously on
DU and DD.
Data Sheet
a) Monitoring Data
gives an example for monitoring of two IOM-2 time slots each on DU or DD
CDA_CR1.
CDA_CR2.
Example for Monitoring Data
EN_O:
EN_O:
EN_I:
EN_I:
h
DPS:
DPS:
TSS:
TSS:
for monitoring from DD respectively. By this it is possible to
CDA20
CDA10
TS(2n)
TS(2n)
’0’
’0’
’1’
’1’
’1’
’0’
102
TS(2n+1)
TS(2n+1)
Description of Functional Blocks
CDA11
CDA21
’0’
’1’
’0’
’1’
’1’
’0’
DD
DU
PEB 3086
2003-01-30
ISAC-SX
h
for