WM8310GEB/V Wolfson Microelectronics, WM8310GEB/V Datasheet - Page 69

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WM8310GEB/V

Manufacturer Part Number
WM8310GEB/V
Description
POWER MANAGEMENT SUBSYSTEM, 169BGA
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8310GEB/V

Supply Voltage
7V
No. Of Step-down Dc - Dc Converters
4
No. Of Ldo Regulators
11
Digital Ic Case Style
BGA
No. Of Pins
169
No. Of Regulated Outputs
13
Operating Temperature Range
-40°C To
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Pre-Production
15.6 DC-DC BUCK CONVERTER CONTROL
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When LDO11_VSEL_SRC = 1, the output voltage of LDO11 follows the voltage selection of DC-DC
Converter 1. This enables both domains to be changed at the same time, eg. the processor core and
processor ‘alive’ domains. The LDO11 output voltage follows DC1_ON_VSEL or DC1_SLP_VSEL
regardless of whether DC-DC1 is enabled or disabled.
Note that, when LDO11_VSEL_SRC = 1, the LDO11 regulator adopts the nearest achievable output
voltage, which may not be identical to the DC-DC1 voltage, due to the more limited range and
resolution of LDO11 - the output voltage of LDO11 is in the range 0.8V to 1.55V in 50mV steps; the
output voltage of DC-DC1 is in the range 0.6V to 1.8V in 12.5mV steps.
Soft-Start control is provided for each of the DC-DC Converters, using the DCm_SOFT_START
register fields. When a DC-DC Converter is switched on, the soft-start circuit will apply current
limiting in order to control the in-rush current. For DC-DC1 and DC-DC2, the current limit is increased
through up to 8 stages to the full load condition. The DCm_SOFT_START registers select the
duration of these stages. (Note that, under light loads, the full start-up may be achieved in fewer than
8 stages.) A similar function is provided for DC-DC3, but only 4 intermediate stages are implemented
for this converter.
When DC-DC3 is operating in Hysteretic Mode, the maximum DC output current can be set using the
DC3_STNBY_LIM register. See Section 15.4.1 for details of the DC-DC3 operating modes.
To ensure stable operation, the register fields DCm_CAP must be set for each of the DC-DC
Converters according to the output capacitance. (Note that these fields are set via OTP/DBE settings
only; they cannot be changed by writing to the control register.) The choice of output capacitor is
described in Section 30.3.
When a DC-DC Converter is disabled, the output pin can be configured to be floating or to be actively
discharged. This is selected using DCm_FLT.
DC-DC Converters 1 and 2 also support selectable switching frequency. This can either be 2MHz or
4MHz, according to the DCm_FREQ register field. (Note that these fields are set via OTP/DBE
settings only; they cannot be changed by writing to the control register.) The switching frequency of
DC-DC3 is fixed at 2MHz.
Note that the supported output voltage range for DC-DC Converters 1 and 2 is restricted in the 4MHz
mode; for output voltages greater than 1.4V, the 2MHz mode must be used.
The switching phase of each DC-DC converter can be set using the DCm_PHASE bits. Where two
converters are operating at the same switching frequency, the supply current ripple can be minimised
by selecting a different switching phase for each converter.
The Dynamic Voltage Scaling (DVS) feature on DC-DC1 and DC-DC2 enables hardware or software
selection of an alternate output voltage, DCm_DVS_VSEL. This may be useful if a short-term
variation in output voltage is required.
The DVS voltage (set by DCm_DVS_VSEL) may be selected by setting DCm_DVS_SRC = 01.
Alternatively, the DVS voltage may be selected under control of one of the Hardware DVS Control
inputs supported via the GPIO pins. See Section 21 for details of configuring the GPIO pins as
Hardware DVS Control inputs.
Whenever the DVS voltage is selected by any method, the DVS selection takes precedence over the
ON, SLEEP or Hardware Control (HWC) configuration. See Section 15.9 for details of Hardware
Control options.
The output voltage ramp rate is selectable for DC-DC Converters 1 and 2. The DCm_RATE field
selects the rate of change of output voltage, whether this is in response to an operating mode
transition, or any hardware or software command. Note that the DCm_RATE field is accurate in
Forced Continuous Conduction Mode (FCCM); in other modes, the actual slew rate may be longer in
the case of a decreasing output voltage selection, especially under light load conditions.
PP, December 2009, Rev 3.0
WM8310
69

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