WM8310GEB/V Wolfson Microelectronics, WM8310GEB/V Datasheet - Page 157

• Manufacturer Part Number: WM8310GEB/V
• Description: POWER MANAGEMENT SUBSYSTEM, 169BGA
• Manufacturer: Wolfson Microelectronics

Specifications of WM8310GEB/V

• Supply Voltage: 7V
• No. Of Step-down Dc - Dc Converters: 4
• No. Of Ldo Regulators: 11
• Digital Ic Case Style: BGA
• No. Of Pins: 169
• No. Of Regulated Outputs: 13
• Operating Temperature Range: -40°C To
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Pre-Production
25 WATCHDOG TIMER
w
The WM8310 includes a Watchdog Timer designed to detect a possible software fault condition
where the host processor has locked up. The Watchdog Timer is a free-running counter driven by the
internal RC oscillator.
The Watchdog Timer is enabled by default; it can be enabled or disabled by writing to the
WDOG_ENA register bit. The Watchdog behaviour in SLEEP is configurable; it can either be set to
continue as normal or to be disabled. The Watchdog behaviour in SLEEP is determined by the
WDOG_SLPENA bit.
The watchdog timer duration is set using WDOG_TO. The watchdog timer can be halted for debug
purposes using the WDOG_DEBUG bit.
The Watchdog reset source is selectable between Software and Hardware triggers. (Note that the
de-selected reset source has no effect.) If the Watchdog is not reset within a programmable timeout
period, this is interpreted by the WM8310 as a fault condition. The Watchdog Timer then either
triggers a Device Reset, or issues a WAKE request or raises an Interrupt. The action taken is
determined by the WDOG_PRIMACT register field.
If the Watchdog is not reset within a further timeout period of the Watchdog counter, a secondary
action is triggered. The secondary action taken at this point is determined by the WDOG_SECACT
register field.
The Watchdog reset source is selected using the WDOG_RST_SRC register bit. When Software
WDOG reset source is selected, the Watchdog is reset by writing a ‘1’ to the WDOG_RESET field.
When Hardware WDOG reset source is selected, the Watchdog is reset by toggling a GPIO pin that
has been configured as a Watchdog Reset Input (see Section 21).
If a Device Reset is triggered by the watchdog timeout, the WM8310 asserts the RESET
the internal control registers (excluding the RTC) and initiates a start-up sequence. Note that, if the
watchdog timeout fault persists, then a maximum of 7 attempts will be made to initiate the start-up
sequence. See Section 24.
Note that the Watchdog control registers are locked by the WM8310 User Key. These registers can
only be changed by writing the appropriate code to the Security register, as described in
Section 12.4.
R16388
(4004h)
Watchdog
ADDRESS
BIT
9:8
15
14
13
12
11
WDOG_ENA
WDOG_DEBU
G
WDOG_RST_
SRC
WDOG_SLPE
NA
WDOG_RESE
T
WDOG_SECA
LABEL
DEFAULT
10
1
0
1
0
0
Watchdog Timer Enable
0 = Disabled
1 = Enabled (enables the watchdog; does
not reset it)
Protected by user key
Watchdog Pause
0 = Disabled
1 = Enabled (halts the Watchdog timer for
system debugging)
Protected by user key
Watchdog Reset Source
0 = Hardware only
1 = Software only
Protected by user key
Watchdog SLEEP Enable
0 = Disabled
1 = Controlled by WDOG_ENA
Protected by user key
Watchdog Software Reset
0 = Normal
1 = Watchdog Reset (resets the watchdog, if
WDOG_RST_SRC = 1)
Protected by user key
Secondary action of Watchdog timeout
DESCRIPTION
PP, December 2009, Rev 3.0
¯ ¯ ¯ ¯ ¯ ¯ pin, resets
WM8310
157