WM8310GEB/V Wolfson Microelectronics, WM8310GEB/V Datasheet - Page 37

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WM8310GEB/V

Manufacturer Part Number
WM8310GEB/V
Description
POWER MANAGEMENT SUBSYSTEM, 169BGA
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8310GEB/V

Supply Voltage
7V
No. Of Step-down Dc - Dc Converters
4
No. Of Ldo Regulators
11
Digital Ic Case Style
BGA
No. Of Pins
169
No. Of Regulated Outputs
13
Operating Temperature Range
-40°C To
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Pre-Production
11.6 ON PIN FUNCTION
w
The ON
used to start-up the WM8310 from the SLEEP or OFF states and also to power down the system.
This pin operates on the LDO12 (VPMIC) power domain and has an internal pull-up resistor. This pin
is asserted by shorting it to GND. A de-bounce circuit is provided on this input pin.
The behaviour of the ON
determined by the ON_PIN_PRIMACT register field. Note that the ON
raised when the ON
If the pin is held asserted for longer than the timeout period set by ON_PIN_TO, then a secondary
action is executed. The secondary action is determined by the ON_PIN_SECACT register field.
If the pin is held asserted for a further timeout period, then a tertiary action is executed. The tertiary
action is not programmable, and is to generate an OFF request.
An OFF request initiated by the ON
CHG_OFF_MASK bit is set. This allows user-initiated OFF events to be disabled in order to maintain
the Battery Charger operation. See Section 17.7.2.
The status of the ON
Note that the ON
be changed by writing the appropriate code to the Security register, as described in Section 12.4.
R16389
(4005h) ON
Pin Control
Table 5 ON Pin Control Registers
The ON
asserted. The ON
event is also raised when the ON
The ON
triggers a primary ON Pin Interrupt, ON_PIN_INT (see Section 23). This can be masked by setting
the mask bit as described in Table 6.
ADDRESS
¯ ¯ pin is intended for connection to the master power switch on the user’s application. It can be
¯ ¯ pin interrupt event is indicated by the ON_PIN_CINT register field. This secondary interrupt
¯ ¯ pin interrupt event is always raised as part of the primary action when the ON
¯ ¯ pin control registers are locked by the WM8310 User Key. These registers can only
¯ ¯ pin interrupt is a selectable option as the secondary action. The ON
¯ ¯ pin is asserted.
¯ ¯ pin can be read at any time via the ON_PIN_STS register.
BIT
9:8
5:4
1:0
3
¯ ¯ pin is programmable. The primary action taken on asserting this pin is
ON_PIN_SECACT
ON_PIN_PRIMACT
ON_PIN_STS
ON_PIN_TO
¯ ¯ pin is de-asserted.
LABEL
¯ ¯ pin may be masked during Battery Charging when the
DEFAULT
01
00
00
0
Secondary action of ON
after 1 timeout period)
00 = Interrupt
01 = ON request
10 = OFF request
11 = Reserved
Protected by user key
Primary action of ON
00 = Ignore
01 = ON request
10 = OFF request
11 = Reserved
Note that an Interrupt is always
raised.
Protected by user key
Current status of ON
0 = Asserted (logic 0)
1 = Not asserted (logic 1)
ON
00 = 1s
01 = 2s
10 = 4s
11 = 8s
Protected by user key
¯ ¯ pin timeout period
¯ ¯ pin interrupt event is always
PP, December 2009, Rev 3.0
DESCRIPTION
¯ ¯ pin
¯ ¯ pin
¯ ¯ pin interrupt
¯ ¯ pin (taken
WM8310
¯ ¯ pin is
37

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