ISP1504A1ETTM ST-Ericsson Inc, ISP1504A1ETTM Datasheet - Page 7

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ISP1504A1ETTM

Manufacturer Part Number
ISP1504A1ETTM
Description
IC USB TXRX HS 36-TFBGA
Manufacturer
ST-Ericsson Inc
Type
Transceiverr
Datasheet

Specifications of ISP1504A1ETTM

Protocol
USB 2.0
Voltage - Supply
3 V ~ 4.5 V
Mounting Type
Surface Mount
Package / Case
36-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Other names
ISP1504A1ET-T
ISP1504A1ET-T

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1504A1ETTM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
ISP1504A1ETTM
Manufacturer:
ST
0
NXP Semiconductors
Table 2.
[1]
[2]
[3]
[4]
ISP1504A1_ISP1504C1_1
Product data sheet
Symbol
CS_N/
PWRDN
RESET_N
DATA7
DP
ID
PSW_N
NXT
STP
FAULT
REG3V3
DIR
REG1V8
n.c.
V
V
XTAL1
XTAL2
CC
BUS
Symbol names ending with underscore N, for example, NAME_N, indicate active LOW signals.
For details on external components required on each pin, see bill of materials and application diagrams in
I = input; O = output; I/O = digital input/output; OD = open-drain output; AI/O = analog input/output; P = power or ground pin.
A detailed description of these pins can be found in
[1][2]
Pin description
Pin
C3
C4
C6
D1
D3
D4
D5
D6
E2
E3
E5
E6
F1, F2
F3
F4
F5
F6
…continued
Type
I
I
I/O
AI/O
I
OD
O
I
I
P
O
P
-
P
AI/O
AI/O
AI/O
[3]
Description
active LOW chip select
plain input
active LOW, asynchronous reset input
If this pin is not used, it must directly be connected to V
plain input
pin 7 of the bidirectional ULPI data bus
slew rate controlled output (1 ns); plain input; programmable pull down
data plus (D+) pin of the USB cable
identification (ID) pin of the micro-USB cable; see
If this pin is not used, it is recommended to connect it to REG3V3.
plain input; TTL level
active LOW external V
open-drain output; 5 V tolerant
ULPI next signal
slew rate controlled output (1 ns)
ULPI stop signal
plain input; programmable pull up
input pin for the external V
If this pin is not used, it must be connected to ground.
plain input; 5 V tolerant
3.3 V regulator output requiring parallel 0.1 F and 4.7 F capacitors; internally
powers OTG, analog core and ATX; cannot be externally used as a power source
ULPI direction signal
slew rate controlled output (1 ns)
1.8 V regulator output requiring parallel 0.1 F and 4.7 F capacitors; internally
powers digital core and analog core; cannot be externally used as a power source
not connected
input supply voltage or battery source; 3.0 V to 4.5 V
must be connected to the V
except when the ISP1504x1 is used as a host-only with an external 5 V source
crystal oscillator or clock input; 1.8 V peak input allowed; frequency is 19.2 MHz for
ISP1504A1, and 26 MHz for ISP1504C1
crystal oscillator output; if crystal is not in use, leave this pin open
When this pin is HIGH, ULPI pins will be 3-stated and the chip is in power-down
mode.
When this pin is LOW, ULPI pins will operate normally.
Rev. 01 — 6 August 2007
Section
[4]
7.9.
BUS
BUS
power switch or external charge pump enable
BUS
digital overcurrent or the fault detector signal
pin of the USB cable; required in all configurations,
ISP1504A1; ISP1504C1
Section 7.6.1
ULPI HS USB OTG transceiver
CC(I/O)
Section
.
© NXP B.V. 2007. All rights reserved.
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