ISP1504A1ETTM ST-Ericsson Inc, ISP1504A1ETTM Datasheet - Page 48

• Manufacturer Part Number: ISP1504A1ETTM
• Description: IC USB TXRX HS 36-TFBGA
• Manufacturer: ST-Ericsson Inc
• Type: Transceiverr

Specifications of ISP1504A1ETTM

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 4.5 V
• Mounting Type: Surface Mount
• Package / Case: 36-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: ISP1504A1ET-T; ISP1504A1ET-T

NXP Semiconductors
10. Register map
Table 19.
[1]
[2]
[3]
[4]
Table 20.
[1]
[2]
[3]
[4]
ISP1504A1_ISP1504C1_1
Product data sheet
Field name
Vendor ID Low register
Vendor ID High register
Product ID Low register
Product ID High register
Function Control register
Interface Control register
OTG Control register
USB Interrupt Enable Rising register
USB Interrupt Enable Falling register
USB Interrupt Status register
USB Interrupt Latch register
Debug register
Scratch register
Reserved (not used, not available)
Access extended register set
Vendor-specific registers
Power Control register
Field name
Maps to immediate register set above
Reserved (do not use)
Read (R): A register can be read. Read-only if this is the only mode given.
Write (W): The pattern on the data bus will be written over all bits of a register.
Set (S): The pattern on the data bus is OR-ed with and written to a register.
Clear (C): The pattern on the data bus is a mask. If a bit in the mask is set, then the corresponding register bit will be set to zero
(cleared).
Read (R): A register can be read. Read-only if this is the only mode given.
Write (W): The pattern on the data bus will be written over all bits of a register.
Set (S): The pattern on the data bus is OR-ed with and written to a register.
Clear (C): The pattern on the data bus is a mask. If a bit in the mask is set, then the corresponding register bit will be set to zero
(cleared).
Immediate register set overview
Extended register set overview
Size
(bits)
8
8
8
8
8
8
8
8
8
8
8
8
8
-
8
8
8
Size
(bits)
8
8
Rev. 01 — 6 August 2007
R
00h
01h
02h
03h
04h to 06h
07h to 09h
0Ah to 0Ch
0Dh to 0Fh
10h to 12h
13h
14h
15h
16h to 18h
-
R
[1]
[1]
Address (6 bits)
Address (6 bits)
W
-
-
-
-
04h
07h
0Ah
0Dh
10h
-
-
-
16h
2Fh
W
19h to 2Eh
30h to 3Ch
00h to 3Fh
40h to FFh
[2]
[2]
3D to 3Fh
ISP1504A1; ISP1504C1
S
-
-
-
-
05h
08h
0Bh
0Eh
11h
-
-
-
17h
-
S
[3]
[3]
C
-
-
-
-
06h
09h
0Ch
0Fh
12h
-
-
-
18h
-
C
[4]
[4]
ULPI HS USB OTG transceiver
References
Section 10.1.1 on page 48
Section 10.1.2 on page 48
Section 10.1.3 on page 49
Section 10.1.4 on page 50
Section 10.1.5 on page 51
Section 10.1.6 on page 52
Section 10.1.7 on page 52
Section 10.1.8 on page 53
Section 10.1.9 on page 54
Section 10.1.10 on page 54
Section 10.1.11 on page 54
Section 10.1.12 on page 54
Section 10.1.13 on page 54
Section 10.1.14 on page 54
References
Section 10.2 on page 55
© NXP B.V. 2007. All rights reserved.
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