ISP1504A1ETTM ST-Ericsson Inc, ISP1504A1ETTM Datasheet - Page 54

• Manufacturer Part Number: ISP1504A1ETTM
• Description: IC USB TXRX HS 36-TFBGA
• Manufacturer: ST-Ericsson Inc
• Type: Transceiverr

Specifications of ISP1504A1ETTM

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 4.5 V
• Mounting Type: Surface Mount
• Package / Case: 36-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: ISP1504A1ET-T; ISP1504A1ET-T

NXP Semiconductors
Table 35.
Table 36.
Table 37.
Table 38.
ISP1504A1_ISP1504C1_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
7 to 5
4
3
2
1
0
Bit
Symbol
Reset
Access
Bit
7 to 5
4
3
2
1
0
Symbol
-
ID_GND_L
SESS_END_L
SESS_VALID_L
VBUS_VALID_L
HOST_DISCON_L
Symbol
-
ID_GND
SESS_END
SESS_VALID
VBUS_VALID
HOST_DISCON
USB Interrupt Status register (address R = 13h) bit allocation
USB Interrupt Status register (address R = 13h) bit description
USB Interrupt Latch register (address R = 14h) bit allocation
USB Interrupt Latch register (address R = 14h) bit description
10.1.8 USB Interrupt Latch register
X
R
R
7
7
0
The bits of the USB Interrupt Latch register are automatically set by the ISP1504x1 when
an unmasked change occurs on the corresponding interrupt source signal. The
ISP1504x1 will automatically clear all bits when the link reads this register, or when the
PHY enters low-power mode.
Remark: It is optional for the link to read this register when the clock is running because
all signal information will automatically be sent to the link through the RXCMD byte.
The bit allocation of this register is given in
reserved
reserved
Description
reserved
ID Ground Latch: Automatically set when an unmasked event occurs on ID_GND. Cleared
when this register is read.
Session End Latch: Automatically set when an unmasked event occurs on SESS_END.
Cleared when this register is read.
Session Valid Latch: Automatically set when an unmasked event occurs on SESS_VLD.
Cleared when this register is read.
V
Cleared when this register is read.
Host Disconnect Latch: Automatically set when an unmasked event occurs on
HOST_DISCON. Cleared when this register is read.
BUS
R
R
X
Description
reserved
ID Ground: Reflects the current value of the ID detector circuit.
Session End: Reflects the current value of the session end voltage comparator.
Session Valid: Reflects the current value of the session valid voltage comparator.
V
Host Disconnect: Reflects the current value of the host disconnect detector.
6
6
0
BUS
Valid Latch: Automatically set when an unmasked event occurs on A_VBUS_VLD.
Valid: Reflects the current value of the V
X
R
R
5
5
0
Rev. 01 — 6 August 2007
ID_GND_L
ID_GND
R
R
4
0
4
0
ISP1504A1; ISP1504C1
SESS_
SESS_
END_L
Table
END
R
R
3
0
3
0
BUS
37.
valid voltage comparator.
VALID_L
SESS_
SESS_
VALID
ULPI HS USB OTG transceiver
R
R
2
0
2
0
VALID_L
VBUS_
VBUS_
VALID
R
R
1
0
1
0
© NXP B.V. 2007. All rights reserved.
DISCON_L
DISCON
HOST_
HOST_
R
R
0
0
0
0
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