ISP1504A1ETTM ST-Ericsson Inc, ISP1504A1ETTM Datasheet - Page 24

• Manufacturer Part Number: ISP1504A1ETTM
• Description: IC USB TXRX HS 36-TFBGA
• Manufacturer: ST-Ericsson Inc
• Type: Transceiverr

Specifications of ISP1504A1ETTM

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 4.5 V
• Mounting Type: Surface Mount
• Package / Case: 36-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: ISP1504A1ET-T; ISP1504A1ET-T

NXP Semiconductors
ISP1504A1_ISP1504C1_1
Product data sheet
Fig 6. Power-up and reset sequence required before the ULPI bus is ready for use
DATA[7:0]
REG1V8
REG1V8
V
PWRDN
detector
internal
internal
CLOCK
CC(I/O)
CS_N/
XTAL1
POR
V
NXT
STP
DIR
t1 = V
t2 = V
HIGH.
t3 = CS_N/PWRDN turns from HIGH to LOW. The ISP1504x1 regulator starts to turn on.
t4 = ULPI pads detect REG1V8 rising above the REG1V8 regulator threshold and are not in 3-state. These pads may drive
either LOW or HIGH. It is recommended that the link ignores the ULPI pins status during t
t5 = The POR threshold is reached and a POR pulse is generated. After the POR pulse, ULPI pins are driven to a defined
level. DIR is driven to HIGH and the other pins are driven to LOW.
t6 = The 19.2 MHz or 26 MHz input clock starts. This clock may be started any time.
t7 = The internal PLL is stabilized after t
will be stabilized after t
to LOW. The link is expected to issue a RESET command to initialize the ISP1504x1.
t8 = The power-up sequence is completed and the ULPI bus interface is ready for use.
CC
t1
CC
CC(I/O)
is applied to the ISP1504x1.
t2
is turned on. ULPI interface pins (CLOCK, DATA[7:0], DIR and NXT) are in 3-state as long as CS_N/PWRDN is
t3
t
PWRUP
startup(PLL)
t4
t5
from POR. The CLOCK pin starts to output 60 MHz. The DIR pin will transition from HIGH
t6
startup(PLL)
t
startup(PLL)
Rev. 01 — 6 August 2007
. If the 19.2 MHz or 26 MHz clock is started before POR, the internal PLL
t7
internal clocks stable
RESET command
TXCMD
ISP1504A1; ISP1504C1
D
internal reset
ULPI HS USB OTG transceiver
PWRUP
.
© NXP B.V. 2007. All rights reserved.
RXCMD
update
004aaa768
bus idle
t8
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