ISP1504A1ETTM ST-Ericsson Inc, ISP1504A1ETTM Datasheet - Page 16

• Manufacturer Part Number: ISP1504A1ETTM
• Description: IC USB TXRX HS 36-TFBGA
• Manufacturer: ST-Ericsson Inc
• Type: Transceiverr

Specifications of ISP1504A1ETTM

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 4.5 V
• Mounting Type: Surface Mount
• Package / Case: 36-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: ISP1504A1ET-T; ISP1504A1ET-T

NXP Semiconductors
ISP1504A1_ISP1504C1_1
Product data sheet
8.1.2 Low-power mode
Table 4.
When the USB is idle, the link can place the ISP1504x1 into low-power mode (also called
suspend mode). In low-power mode, the data bus definition changes to that shown in
Table
Control register to logic 0. To exit low-power mode, the link asserts the STP signal. The
ISP1504x1 will draw only suspend current from the V
During low-power mode, the clock on XTAL1 may be stopped. The clock must be started
again before asserting STP to exit low-power mode. After exiting low-power mode, the
ISP1504x1 will send an RXCMD to the link if a change was detected in any interrupt
source, and the change still exists. An RXCMD may not be sent if the interrupt condition is
removed before exiting.
For more information on low-power mode enter and exit protocols, refer to UTMI+ Low Pin
Interface (ULPI) Specification Rev. 1.1 .
Signal
name
DIR
STP
NXT
5. To enter low-power mode, the link sets the SUSPENDM bit in the Function
ULPI signal description
Direction on
ISP1504x1
O
I
O
Rev. 01 — 6 August 2007
Signal description
Direction: Controls the direction of data bus DATA[7:0]. In
synchronous mode, the ISP1504x1 drives DIR to LOW by default,
making the data bus an input so that the ISP1504x1 can listen for
TXCMDs from the link. The ISP1504x1 drives DIR to HIGH only when
it has data for the link. When DIR and NXT are HIGH, the byte on the
data bus contains decoded USB data. When DIR is HIGH and NXT is
LOW, the byte contains status information called RXCMD (receive
command). The only exception to this rule is when the PHY returns
register read data, where NXT is also LOW, replacing the usual
RXCMD byte. Every change in DIR causes a turnaround cycle on the
data bus, during which DATA[7:0] is not valid and must be ignored by
the link.
DIR is always asserted during low-power and serial modes.
Stop: In synchronous mode, the link drives STP to HIGH for one cycle
after the last byte of data is sent to the ISP1504x1. The link can
optionally assert STP to force DIR to be de-asserted.
In low-power and serial modes, the link holds STP at HIGH to wake up
the ISP1504x1, causing the ULPI bus to return to synchronous mode.
Next: In synchronous mode, the ISP1504x1 drives NXT to HIGH to
throttle data. If DIR is LOW, the ISP1504x1 asserts NXT to notify the
link to place the next data byte on DATA[7:0] in the following clock
cycle. If DIR is HIGH, the ISP1504x1 asserts NXT to notify the link that
a valid USB data byte is on DATA[7:0] in the current cycle. The
ISP1504x1 always drives an RXCMD when DIR is HIGH and NXT is
LOW, unless register read data is to be returned to the link in the
current cycle.
NXT is not used in low-power or serial mode.
…continued
ISP1504A1; ISP1504C1
CC
supply (see
ULPI HS USB OTG transceiver
Table
© NXP B.V. 2007. All rights reserved.
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