PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 62

• Manufacturer Part Number: PSB2186N-V11TR
• Description: IC ISDN SUBSCRIB ACCESS 44-PLCC
• Manufacturer: Infineon Technologies

Specifications of PSB2186N-V11TR

• Controller Type: Subscriber Access Controller (ISDN)
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 17mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PSB2186N-V11INTR; PSB2186N-V11TR

2.6
The ISAC-S TE provides several test and diagnostic functions which can be grouped as
follows:
Test loop 3 is activated with the C/I-channel command Activate Request Loop (ARL). An S
interface is not required since INFO3 is looped back to the receiver. When the receiver has
synchronized itself to this signal, the message "Test Indication" (or "Awake Test Indication") is
delivered in the C/I channel. No signal is transmitted over the S interface.
In the test loop mode the S-Interface awake detector is enabled i.e. if a level is detected (e.g.
Info 2/Info 4) this will be reported by the Awake Test Indication (ATI). The loop function is not
effected by this condition and the internally generated 192-kHz line clock does not depend on
the signal received at the S interface.
Semiconductor Group
digital loop via TLP (Test Loop, SPCR register) command bit: IDP1 is internally connected
with IDP0, output from layer 1 (S/T) on IDP0 is ignored; this is used for testing ISAC-S TE
functionality excluding layer 1;
(including clocking, in TE mode), via bit TEM (Test Mode in ADF1 register); the ISAC-S TE
is then fully compatible to the ICC (PEB 2070) seen at the IOM interface.
loop at the analog end of the S interface;
test of layer-2 functions while disabling all layer-1 functions and pins associated with them
Test Functions
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Functional Description