PSB2186N-V11TR Infineon Technologies, PSB2186N-V11TR Datasheet - Page 137

• Manufacturer Part Number: PSB2186N-V11TR
• Description: IC ISDN SUBSCRIB ACCESS 44-PLCC
• Manufacturer: Infineon Technologies

Specifications of PSB2186N-V11TR

• Controller Type: Subscriber Access Controller (ISDN)
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 17mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PSB2186N-V11INTR; PSB2186N-V11TR

RME has been indicated, bits 0-4 of the RBCL register represent the number of bytes stored
in the RFIFO. Bits 7-5 of RBCL and bits 0 to 3 of RBCH indicate the total number of 32-byte
blocks which where stored until the reception of the remainder block.
The contents of RBCL, RBCH and RSTA registers are valid only after the occurrence of the
RME interrupt, and remain valid until the microprocessor issues an acknowledgement (RMC).
The contents of RHCR and/or SAPR, also remain valid until acknowledgement.
If a frame could not be stored due to a full RFIFO, the microcontroller is informed of this via the
Receive Frame Overflow interrupt (RFO).
3.4.2
After the XFIFO status has been checked by polling the Transmit FIFO Write Enable (XFW) bit
or after a Transmit Pool Ready (XPR) interrupt, up to 32 bytes may be entered in XFIFO.
Transmission of an HDLC frame is started when a transmit command (see table 13) is issued.
The opening flag is generated automatically. In the case of an auto-mode transmission (XIF or
XIFC), the control field is also generated by the ISAC-S TE, and the contents of register XAD1
(and, for LAPD, XAD2) are transmitted as the address, as shown in figure 53.
Figure 53
Transmit Data Flow
Semiconductor Group
HDLC Frame
Transmit I-Frame
(XIF)
Auto Mode,8
Transmit I-Frame
(XIF)
Auto Mode,
Transmit Transparent
Frame (XTF)
All Modes
-
HDLC-Frame Transmission
16
-
Bit Addr.
-
Bit Addr.
Note: Length of Control Field is b or 16
Description of Symbols:
Flag
Flag
Flag
Flag
XAD1
Generated automatically by ISAC
Written initially by CPU
Loaded (repeatedly)
request
Address
XAD1
XAD2
(XPR Interrupt)
Control
Control
Control
137
XFIFO
by CPU upon ISAC
Bit
(Info Register)
Information
XFIFO
XFIFO
R
-S TE
R
-S TE
Operational Description
CRC
CRC
CRC
CRC
Flag
Flag
Flag
Flag
ITD05667