DP83840AVCE National Semiconductor, DP83840AVCE Datasheet - Page 37

• Manufacturer Part Number: DP83840AVCE
• Description: IC ETHERNET PHYS LAYER 100-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83840AVCE

• Controller Type: Ethernet Controller, 10Base-T
• Interface: IEEE 802.3af
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 335mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83840AVCE

Version A
3.0 Functional Description
Note 1:“M” indicates logic mid level (Vcc/2), “1” indicates logic high level, “0” indicates logic low level
Note 2:Default advertisement on enable of Auto-Negotiation via the ANAR set to 100BASE-X Full-Duplex, 100BASE-X Half-Duplex, 10BASE-T Full-Duplex,
and 10BASE-T Half-Duplex)
FORCED MODES
ADVERTISED MODES
(Pin 46)
AN1
M
M
M
M
C
C
C
C
0
1
0
0
1
1
1
0
(Pin 95)
AN0
M
M
M
M
C
C
C
C
0
1
0
1
0
1
1
0
PAR (19h) Bit 10 = 0, Bit 6 = 1, Bit 7= 0
ANAR (04h) [8:5] = 021h
PAR (19h) Bit 10 = 0, Bit 6 = 1, Bit 7= 1
ANAR (04h) [8:5] = 041h
PAR (19h)) Bit 10 = 0, Bit 6 = 0, Bit 7= 0
ANAR (04h) [8:5] = 081h
PAR (19h) Bit 10 = 0, Bit 6 = 0, Bit 7 = 1
ANAR (04h) [8:5] = 101h
PAR (19h) Bit 10 = 0, Bit 6 = 0, Bit 7 = 1
ANAR (04h) [8:5] = 181h
PAR (19h) Bit 10 = 0, Bit 6 = 0, Bit 7 = 1
ANAR (04h) [8:5] = 141h
PAR (19h) Bit 10 = 0, Bit 6 = 0, Bit 7 = 0
ANAR (04h) [8:5] = 0A1h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 1E1h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 021h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 041h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 081h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 101h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 141h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 0A1h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 181h
PAR (19h) Bit 10 = 1
ANAR (04h) [8:5] = 061h
(Continued)
Table III. Auto-Negotiation Mode Select
Action
37
Auto-Negotiation Disabled with Only Half-Duplex
10BASE-T Forced (Note 2)
Auto-Negotiation disabled with Only Full-Duplex
10BASE-T Forced (Note 2)
Auto-Negotiation disabled with Only Half-Duplex
100BASE-X Forced (Note 2)
Auto-Negotiation disabled with Only Full-Duplex
100BASE-X Forced (Note 2)
Auto-Negotiation disabled with Only Full-Duplex
100BASE-X Forced
(Default advertisement set to 100BASE-X Half-
Duplex and 100BASE-X Full-Duplex)
Auto-Negotiation disabled with Only Full-Duplex
100BASE-X Forced
(Default advertisement set to 100BASE-X Full-
Duplex and 10BASE-T Full Duplex)
Auto-Negotiation disabled with Only Half-Duplex
100BASE-X Forced
(Default advertisement set to 100BASE-X Half-
Duplex and 10BASE-T Half-Duplex)
Auto-Negotiation Enabled for All DP83840A
Possible Protocols (Note 2)
Auto-Negotiation Enabled with Only Half-Duplex
10BASE-T Available
Auto-Negotiation Enabled with Only Full-Duplex
10BASE-T Available
Auto-Negotiation Enabled with Only Half-Duplex
100BASE-X Available
Auto-Negotiation Enabled with Only Full-Duplex
100BASE-X Available
Auto-Negotiation Enabled with 100BASE-X Full-
Duplex and 10BASE- T Full Duplex Available
Auto-Negotiation Enabled with 100BASE-X Half-
Duplex and 10BASE-T Half Duplex Available
Auto-Negotiation Enabled with 100BASE-X Full-
Duplex and 100BASE-X Half Duplex Available
Auto-Negotiation Enabled with 10BASE-T Full-
Duplex and 10BASE-T Half Duplex Available
National Semiconductor
Mode