LAN9420I-NU SMSC, LAN9420I-NU Datasheet - Page 115

IC ETHERNET CTRLR SGL 128VTQFP

LAN9420I-NU

Manufacturer Part Number
LAN9420I-NU
Description
IC ETHERNET CTRLR SGL 128VTQFP
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheets

Specifications of LAN9420I-NU

Controller Type
Ethernet Controller
Interface
PCI
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
145mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.6 V
Maximum Operating Temperature
+ 85 C
Ethernet Connection Type
10/100 Base-T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1085

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Part Number
Manufacturer
Quantity
Price
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SMSC
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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
4.3.9
31:29
27:17
BITS
15:0
28
16
RESERVED
MIL RX FIFO Full Counter Overflow (MIL_OVER)
Overflow bit for the MIL_FIFO_FULL counter. This bit is automatically
cleared on a read.
MIL RX FIFO Full Counter (MIL_FIFO_FULL)
This field indicates the number of frames missed due a MIL RX FIFO full
condition. This counter is automatically cleared on a read.
RX Buffer Unavailable Counter Overflow (UNAV_OVER)
Overflow bit for the RX_BUFF_UNAV counter. This bit is automatically
cleared on a read.
RX Buffer Unavailable Counter (RX_BUFF_UNAV)
This field indicates the number of frames missed due to receive buffers
being unavailable. This counter is incremented each time the DMAC
discards an incoming frame. This counter is automatically cleared on a
read.
Missed Frame and Buffer Overflow Counter Reg (MISS_FRAME_CNTR)
The DMAC maintains two counters to track the number of missed frames during a receive operation.
The MISS_FRAME_CNTR register reports the current value of these counters and their overflow bits.
Offset:
DESCRIPTION
0020h
DATASHEET
115
Size:
32 bits
TYPE
RO
RC
RC
RC
RC
Revision 1.4 (12-17-08)
DEFAULT
0000h
000h
0b
0b
-

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