CY7C67200-48BAXI Cypress Semiconductor Corp, CY7C67200-48BAXI Datasheet - Page 59

• Manufacturer Part Number: CY7C67200-48BAXI
• Description: USB HOST/PERIPH CNTRLR 48LFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-OTG™r
• Type: OTG Programmable USB On The Gor

Specifications of CY7C67200-48BAXI

• Package / Case: 48-LFBGA
• Controller Type: USB Peripheral Controller
• Interface: Serial
• Voltage - Supply: 2.7 V ~ 3.6 V, 3 V ~ 3.6 V
• Current - Supply: 80mA, 135mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Rate: 2 Mbps
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current: 80 mA
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Operating Supply Voltage: 2.7 V to 3.6 V
• Controller Family/series: PSoC 1
• Core Size: 16 Bit
• No. Of I/o's: 25
• Program Memory Size: 16KB
• Ram Memory Size: 8KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2262; CY7C67200-48BAXI

Document #: 38-08014 Rev. *G
Data Ready bit of the SPI Control register is set to ‘1’. Writing to this register in PIO byte mode will initiate a transfer of data, the
number of bits defined by Transmit Bit Length field in the SPI Control register.
Data (Bits [7:0])
The Data field contains data received or to be transmitted on the SPI port.
Reserved
All reserved bits must be written as ‘0’.
SPI Transmit Address Register [0xC0D8] [R/W]
Register Description
The SPI Transmit Address register is used as the base address for the SPI transmit DMA.
Address (Bits [15:0])
The Address field sets the base address for the SPI transmit DMA.
SPI Transmit Count Register [0xC0DA] [R/W]
Register Description
The SPI Transmit Count register designates the block byte length for the SPI transmit DMA transfer.
Count (Bits [10:0])
The Count field sets the count for the SPI transmit DMA transfer.
Reserved
All reserved bits must be written as ‘0’.
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
R/W
R/W
R/W
15
15
0
7
0
0
7
0
-
R/W
R/W
R/W
14
14
0
6
0
0
6
0
-
Figure 69. SPI Transmit Address Register
Figure 70. SPI Transmit Count Register
Reserved
R/W
R/W
R/W
13
13
0
5
0
0
5
0
-
R/W
R/W
R/W
12
12
0
0
4
0
4
0
-
Address...
...Address
...Count
R/W
R/W
R/W
11
11
0
0
3
0
3
0
-
R/W
R/W
R/W
R/W
10
10
0
0
2
0
2
0
Count...
R/W
R/W
R/W
R/W
9
0
9
0
1
0
1
0
CY7C67200
Page 59 of 78
R/W
R/W
R/W
R/W
8
0
8
0
0
0
0
0
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