LTC4278CDKD#PBF Linear Technology, LTC4278CDKD#PBF Datasheet - Page 32

• Manufacturer Part Number: LTC4278CDKD#PBF
• Description: IC PD IEEE 802.3AT 25.5W 32-DFN
• Manufacturer: Linear Technology

Specifications of LTC4278CDKD#PBF

• Controller Type: Powered Device Interface Controller (PD)
• Interface: IEEE 802.3af
• Voltage - Supply: 4.5 V ~ 20 V
• Current - Supply: 6.4mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-DFN
• Input Voltage: 60V
• Supply Current: 1.35mA
• Digital Ic Case Style: DFN
• No. Of Pins: 32
• Duty Cycle (%): 88%
• Frequency: 100kHz
• Operating Temperature Range: °C To +70°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
LTC4278
If we wanted a V
(5%) of hysteresis (on at 36V, off at 34.2V):
Even with good board layout, board noise may cause
problems with UVLO. You can fi lter the divider but keep
large capacitance off the UVLO node because it will slow
the hysteresis produced from the change in bias current.
Figure 13c shows an alternate method of fi ltering by split-
ting the R
more of the resistance on the UVLO side.
Converter Start-Up
The standard topology for the LTC4278 uses a third trans-
former winding on the primary side that provides both the
feedback information and local V
(Figure 14). This power bootstrapping improves converter
effi ciency but is not inherently self-starting. Start-Up is
affected with an external preregulator circuit that conditions
the input line voltage for the LTC4278 during start-up.
Upon application of power, C
regulator, thereby providing an appropriate supply voltage
at the V
typically in the range 7V and is used during start-up. After
converter startup, the third transformer winding becomes
energized and is designed to generate a higher voltage than
the preregulator. The higher voltage of the third winding
turns off QPR and provides an effi cient method to power
the LTC4278.
Design of the V
propriate voltage ranges for both the preregulator and
the third transformer winding. The preregulator voltage
is set as low as possible while ensuring it’s worst-case
minimum voltage is high enough to drive the switching
FETs gates during the startup period. The third winding
output voltage is selected to ensure that it’s worst-case
minimum voltage exceeds the preregulator voltage in order
32
R
R
B
A
=
= 1.8V
CC
⎛
⎜
⎝
3.4μA
A
1.23V
36V
resistor with the capacitor. The split should put
pin for the LTC4278. This supply voltage is
523k
CC
= 529k, use 523k
– 1
IN
power circuitry involves selecting ap-
-referred trip point of 36V, with 1.8V
⎞
⎟
⎠
= 18.5k, use 18.7k
VCC
CC
is charged via the pre-
power for the LTC4278
to turn off Q
disadvantage is that a small degradation in effi ciency may
occur. It is also necessary to verify that the worst-case
maximum winding voltage is not high enough to damage
the B-E junction of Q
Control Loop Compensation
Loop frequency compensation is performed by connect-
ing a capacitor network from the output of the feedback
amplifi er (V
Because of the sampling behavior of the feedback amplifi er,
compensation is different from traditional current mode
controllers. Normally only C
be used to add a zero, but the phase margin improvement
traditionally offered by this extra resistor is usually already
accomplished by the nonzero secondary circuit impedance.
C
pole and is usually sized at 0.1 times C
VCMP2
V
IN
can be used to add an additional high frequency
Figure 15. V
Figure 14. Typical Power Bootstrapping
PR
CMP
. If the two voltage ranges overlap, the only
pin) to ground as shown in Figure 15.
Q
V
PR
17
CMP
C
VCC
PR
CMP
LTC4278
GND
.
V
CC
Compensation Network
4278 F15
C
VCMP2
VCMP
4278 F14
PG
FB
is required. R
R
VCMP
C
VCMP
VCMP
•
•
•
.
VCMP
4278fa
can