IDTSTAC9752XXTAEB2XR IDT, Integrated Device Technology Inc, IDTSTAC9752XXTAEB2XR Datasheet - Page 3

• Manufacturer Part Number: IDTSTAC9752XXTAEB2XR
• Description: IC CODEC AC'97 MIC/JACK 48-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9752XXTAEB2XR

• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9752XXTAEB2XR

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
6. STAC9752/9753 MIXER ..........................................................................................................43
7. MIXER FUNCTIONAL DIAGRAMS ........................................................................................44
8. PROGRAMMING REGISTERS ...............................................................................................47
5.4. AC-Link Input Frame (SDATA_IN) ................................................................................................. 36
5.5. AC-Link Interoperability Requirements and Recommendations ...................................................... 40
5.6. Slot Assignments for Audio ............................................................................................................. 41
7.1. Analog Mixer Input ......................................................................................................................... 45
7.2. Mixer Analog Output ....................................................................................................................... 45
7.3. SPDIF Digital Mux ...........................................................................................................................45
7.4. PC Beep Implementation ................................................................................................................ 46
8.1. Register Descriptions ...................................................................................................................... 48
8.2. General Purpose Input & Outputs ................................................................................................... 64
5.3.8. Slot 12: Audio GPIO Control Channel ............................................................................... 36
5.4.1. Slot 0: TAG ........................................................................................................................37
5.4.2. Slot 1: Status Address Port / SLOTREQ signalling bits .....................................................37
5.4.3. Slot 2: Status Data Port ..................................................................................................... 38
5.4.4. Slot 3: PCM Record Left Channel ..................................................................................... 38
5.4.5. Slot 4: PCM Record Right Channel ................................................................................... 38
5.4.6. Slot 5: Modem Line 1 ADC ................................................................................................ 38
5.4.7. Slot 6 - 9: ADC ................................................................................................................... 38
5.4.8. Slots 7 & 8: Vendor Reserved ........................................................................................... 39
5.4.9. Slot 10 & 11: ADC ............................................................................................................. 39
5.4.10. Slot 12: Reserved ............................................................................................................ 39
5.5.1. “Atomic slot” Treatment of Slot 1 Address and Slot 2 Data ...............................................40
7.4.1. Analog PC Beep ................................................................................................................ 46
7.4.2. Digital PC Beep ................................................................................................................. 46
8.1.1. Reset (00h) ....................................................................................................................... 48
8.1.2. Master Volume Registers (02h) ........................................................................................ 48
8.1.3. Headphone Volume Registers (04h) ................................................................................. 49
8.1.4. Master Volume MONO (06h) ............................................................................................ 50
8.1.5. PC BEEP Volume (0Ah) ................................................................................................... 51
8.1.6. Phone Volume (Index 0Ch) .............................................................................................. 51
8.1.7. Mic Volume (Index 0Eh) .................................................................................................... 52
8.1.8. LineIn Volume (Index 10h) ............................................................................................... 52
8.1.9. CD Volume (Index 12h) .................................................................................................... 53
8.1.10. Video Volume (Index 14h) ............................................................................................. 53
8.1.11. Aux Volume (Index 16h) ................................................................................................. 54
8.1.12. PCMOut Volume (Index 18h) ......................................................................................... 54
8.1.13. Record Select (1Ah) ....................................................................................................... 55
8.1.14. Record Gain (1Ch) ......................................................................................................... 55
8.1.15. General Purpose (20h) ................................................................................................... 56
8.1.16. 3D Control (22h) ............................................................................................................. 56
8.1.17. Audio Interrupt and Paging (24h) .................................................................................... 57
8.1.18. Powerdown Ctrl/Stat (26h) .............................................................................................. 58
8.1.19. Extended Audio ID (28h) ................................................................................................ 59
8.1.20. Extended Audio Control/Status (2Ah) ............................................................................. 61
8.1.21. PCM DAC Rate Registers (2Ch and 32h) ...................................................................... 63
8.1.22. PCM DAC Rate (2Ch) .................................................................................................... 63
8.1.23. PCM LR ADC Rate (32h) ............................................................................................... 63
8.1.24. SPDIF Control (3Ah) ........................................................................................................ 64
8.2.1. EAPD ................................................................................................................................. 64
8.2.2. GPIO Pin Definitions .......................................................................................................... 65
8.2.3. GPIO Pin Implementation .................................................................................................. 65
8.2.4. Extended Modem Status and Control Register (3Eh) ........................................................65
8.2.5. GPIO Pin Configuration Register (4Ch) ............................................................................. 66
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STAC9752/9753
REV 3.3 1206