TSPC603RVA8LC Atmel, TSPC603RVA8LC Datasheet - Page 46

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TSPC603RVA8LC

Manufacturer Part Number
TSPC603RVA8LC
Description
IC MPU 32BIT 8MHZ 240CERQUAD
Manufacturer
Atmel
Datasheet

Specifications of TSPC603RVA8LC

Processor Type
PowerPC 603e 32-Bit RISC
Speed
200MHz
Voltage
2.5V
Mounting Type
Surface Mount
Package / Case
240-Cerquad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
14.2
14.3
14.4
46
Decoupling Recommendations
Connection Recommendations
Pull-up Resistor Requirements
TSPC603R
Due to the 603e’s dynamic power management feature, large address and data buses, and high
operating frequencies, the 603e can generate transient power surges and high frequency noise
in its power supply, especially while driving large capacitive loads. This noise must be prevented
from reaching other components in the 603e system, and the 603e itself requires a clean, tightly
regulated source of power. Therefore, it is recommended that the system designer place at least
one decoupling capacitor at each
these decoupling capacitors receive their power from separate
planes in the PCB, utilizing short traces to minimize inductance.
These capacitors should vary in value from 220 pF to 10 µF to provide both high and low fre-
quency filtering, and should be placed as close as possible to their associated
The suggested values for the
(ceramic). The suggested values for the O
10 µF (tantalum). Only SMT (Surface Mount Technology) capacitors should be used to minimize
lead inductance.
In addition, it is recommended that there be several bulk storage capacitors distributed around
the PCB, feeding the
itors. These bulk capacitors should also have a low ESR (equivalent series resistance) rating to
ensure the quick response time necessary. They should also be connected to the power and
ground planes through two vias to minimize inductance. The suggested bulk capacitors are 100
µF (AVX TPS tantalum) or 330 µf (AVX TPS tantalum).
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropri-
ate signal level. Unused active low inputs should be tied to
should be connected to GND. All NC (non-connected) signals must remain unconnected.
Power and ground connections must be made to all external
603e.
The 603e requires high-resistive (weak: 10 kΩ) pull-up resistors on several control signals of the
bus interface to maintain the control signals in the negated state after they have been actively
negated and released by the 603e or other bus master. These signals are: TS, ABB, DBB, and
ARTRY.
In addition, the 603e has three open-drain style outputs that require pull-up resistors (weak or
stronger: 4.7 kΩ - 10 kΩ) if they are used by the system. These signals are: APE, DPE, and
CKSTP_OUT.
During inactive periods on the bus, the address and transfer attributes on the bus are not driven
by any master and may float in the high-impedance state for relatively long periods of time.
Since the 603e must continually monitor these signals for snooping, this floating condition may
cause excessive power to be drawn by the input revivers on the 603e. It is recommended that
these signals be pulled up through weak (10 kΩ) pull-up resistors or restored in some manner by
the system. The snooped address and transfer attribute inputs are: A[0-3], AP[0-3], TT[0-4],
TBST, and GBL.
The data bus input receivers are normally turned off when no read operation is in progress and
do not require pull-up resistors on the data bus.
V
DD
and O
V
V
DD
DD
V
planes, to enable quick recharging of the smaller chip capac-
pins are 220 pF (ceramic), 0.01 µF (ceramic) and 0.1 µf
DD
and O
V
DD
V
pins are 0.01 µF (ceramic), 0.1 µF (ceramic), and
DD
pin of the 603e. It is also recommended that
V
V
DD
DD
, O
. Unused active high inputs
V
DD
V
, O
DD
, and GND pins of the
V
DD
, and GND power
V
DD
5410B–HIREL–09/05
or O
V
DD
pin.

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