PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 86

• Manufacturer Part Number: PNX1500E/G,557
• Description: IC MEDIA PROC 240MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1296; 935277746557; PNX1500E/G

NXP Semiconductors
Volume 1 of 1
3. System Resources
Table 2: PNX15xx/952x Series Boot Options
PNX15XX_PNX952X_SER_N_4
Product data sheet
BOOT_MODE
000
100
001
101
x10
s11
other
3.1 System Reset
3.2 System Booting
Description
Set up system, and start the TM3260 CPU from a 8-bit NOR Flash or ROM attached to PCI/
XIO
Set up system, and start the TM3260 CPU from a 16-bit NOR Flash or ROM attached to PCI/
XIO
Set up system, and start the TM3260 CPU from a 8-bit NAND Flash attached to PCI/XIO
Set up system, and start the TM3260 CPU from a 16-bit NAND Flash attached to PCI/XIO
Boots in host assisted mode with a default SubSystem ID of 0x1234 and a default System
Vendor ID of 0x5678. This boot mode can be used for standalone system but should not be
used for a PC PCI plug-in card since such a board requires a personal System Vendor and
SubSystem ID. Instead the I
Boots from a I
supported. The entire system can be initialized in a custom fashion by the boot command
structure. The I
and to the main memory. BOOT_MODE[2] defines the speed of the I
kHz.
Reserved
The PNX15xx/952x Series includes a system reset module. This reset module
provides a synchronous reset to internal PNX15xx/952x Series logic and a reset
output pin for initialization of external system components. A system reset can be
initiated in response to a board level reset input pin, a software configuration write or
as a result of a programmable watchdog timer time-out. This watchdog timer is a fail-
safe recovery mechanism which may be enabled by software. When enabled, a
periodic interrupt is sent to the TM3260 CPU. If the CPU does not respond to the
interrupt within a programmable time-out period, then the system is assumed to be
hung and the system reset is asserted.
Boot also resets board level peripherals by asserting the SYS_RST_OUT_N pin.
The PNX15xx/952x Series boot method is controlled by the BOOT_MODE[7:0] pins’
resistive straps. The
be found in
the code on these pins is sampled. The pins operate as GPIO pins after boot.
The PNX15xx/952x Series on-chip TM3260 CPU is capable of direct standard Flash
execution to allow for booting. Note: Direct execution from NAND Flash, a.k.a. disk
Flash is not supported. Direct execution from flash, however, has very limited
performance. Hence, the TM3260 typically copies a Flash file to high-performance
system DRAM, and executes it in DRAM. That Flash file contains the self-
decompressing initial system software application. This multi-stage boot process that
starts a compressed code module minimizes system memory cost.
2
Chapter 6 Boot
C EEPROM attached to the I
2
C EEPROM holds write commands and writes data to internal MMIO registers
Rev. 4.0 — 03 December 2007
Table 2
2
C boot EEPROM should be used.
Module. At the time of the RESET_IN input deassertion,
shows the main boot modes available. More details can
2
C bus. EEPROMs of 2 KB - 64 KB size are
PNX15xx/952x Series
2
C bus, i.e. 100 or 400
Chapter 2: Overview
© NXP B.V. 2007. All rights reserved.
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