PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 578

• Manufacturer Part Number: PNX1500E/G,557
• Description: IC MEDIA PROC 240MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1296; 935277746557; PNX1500E/G

NXP Semiconductors
Volume 1 of 1
Table 6: SPDIF Input Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
5
4
3
2
1
0
Offset 0x10 AFE8
31:10
9
8
7
6
5
4
3
2
1
0
Offset 0x10 AFEC
31:10
9
Symbol
PERR_ENBL
OVR_ENBL
HBE_ENBL
BUF1_ACTIVE_ENBL
BUF2_FULL_ENBL
BUF1_FULL_ENBL
Unused
UNLOCK_CLR
UCBITS_CLR
LOCK_CLR
VERR_CLR
PERR_CLR
OVR_CLR
HBE_CLR
BUF1_ACTIVE_CLR
BUF2_FULL_CLR
BUF1_FULL_CLR
Unused
UNLOCK_SET
SPDI_INTCLR
SPDI_INTSET
…Continued
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
W
W
W
W
W
Value
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
-
0
Rev. 4.0 — 03 December 2007
Description
1 = PERR bit in SPDI_STATUS is enabled for interrupts.
0 = PERR bit in SPDI_STATUS is disabled for interrupts.
1 = OVERRUN bit in SPDI_STATUS is enabled for interrupts.
0 = OVERRUN bit in SPDI_STATUS is disabled for interrupts.
1 = HBE bit in SPDI_STATUS is enabled for interrupts.
0 = HBE bit in SPDI_STATUS is disabled for interrupts.
1 = BUF1_ACTIVE bit in SPDI_STATUS is enabled for interrupts.
0 = BUF1_ACTIVE bit in SPDI_STATUS is disabled for interrupts.
1 = BUF2_FULL bit in SPDI_STATUS is enabled for interrupts.
0 = BUF2_FULL bit in SPDI_STATUS is disabled for interrupts.
1 = BUF1_FULL bit in SPDI_STATUS is enabled for interrupts.
0 = BUF1_FULL bit in SPDI_STATUS is disabled for interrupts.
1 = Clear UNLOCK bit in SPDI_STATUS.
0 = No effect
1 = Clear UCBITS in SPDI_STATUS.
0 = No effect.
1 = Clears LOCK in SPDI_STATUS.
0 = No effect.
1 = Clear VERR in SPDI_STATUS.
0 = No effect
1 = Clear PERR in SPDI_STATUS.
0 = No effect.
1 = Clear OVERRUN in SPDI_STATUS.
0 = No effect.
1 = Clear HBE in SPDI_STATUS.
0 = No effect.
1 = Clear BUF1_ACTIVE in SPDI_STATUS.
0 = No effect.
1 = Clear BUF2_FULL in SPDI_STATUS.
0 = No effect.
SPDI_BASE1 must be valid before setting BUF2_FULL_CLR.
1 = Clear BUF1_FULL in SPDI_STATUS.
0 = No effect.
SPDI_BASE1 must be valid before setting BUF1_FULL_CLR.
1 = UNLOCK bit in SPDI_STATUS is to be set to logic ‘1’. Level
trigger interrupt will be raised to the external interrupt controller if
the corresponding enable bit is set to logic ‘1’.
0 = No effect
PNX15xx/952x Series
Chapter 18: SPDIF Input
© NXP B.V. 2007. All rights reserved.
18-578