PNX1500E/G,557 NXP Semiconductors, PNX1500E/G,557 Datasheet - Page 264

• Manufacturer Part Number: PNX1500E/G,557
• Description: IC MEDIA PROC 240MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.14 V ~ 1.26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1296; 935277746557; PNX1500E/G

NXP Semiconductors
Volume 1 of 1
Table 9: PCI Configuration Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
This aperture is for the SDRAM on the PNX15xx/952x Series.
31:28
27:21
20:4
3
2:0
Offset 0x0014
This aperture will be set to 2 MB for MMIO on the PNX15xx/952x Series.
31:28
27:21
20:4
3
2:0
Offset 0x0018
This aperture is for the XIO on the PNX15xx/952x Series, which supports up to 128 MB of XIO memory space.
31:28
Symbol
Base10 Address
Base10 Address
Reserved
Prefetchable
Type
Base14 Address
Base14 Address
Reserved
Prefetchable
Type
Base18 Address
Base14 Address Register
Base18 Address Register
Acces
s
R/W
R/W*
R
R
R
R/W
R/W*
R
R
R
R/W
Value
0
0
0
*cfg
0
0001
1011111
0
*cfg
0
0001
Rev. 4.0 — 03 December 2007
Description
Upper 4 bits of base10 address of the first memory aperture
*The base 10 can be configured to various aperture sizes from 2
MB to 256 MB. (See pci_setup register). Depending on aperture
size selected, various bits will be R/W or Read Only.
Bit:
256M: RO
128M: RW
64M:
32M:
16M:
8M:
4M:
2M:
RO = Read-only bits read back as zero.
Value is determined at boot time by the pci_setup register.
Indicates type 0 memory space (locatable anywhere in 32-bit
address space).
Upper 4 bits of base14 address of the first memory or IO aperture
*The base 14 can be configured to various aperture sizes from 2
MB to 256 MB. (See pci_setup register). Depending on aperture
size selected, various bits will be R/W or Read Only.
Bit:
256M:
128M:
64M:
32M:
16M:
8M:
4M:
2M:
RO = Read-only bits read back as zero.
Value is determined at boot time by the pci_setup register.
Indicates type 0 memory space (locatable anywhere in 32-bit
address space).
Upper 18 bits of base address of the first memory or IO aperture
27
RW
RW
RW
RW
RW
RW
27
RO
RW
RW
RW
RW
RW
RW
RW
26
RO
RO
RW
RW
RW
RW
RW
RW
26
RO
RO
RW
RW
RW
RW
RW
RW
25
RO
RO
RO
RW
RW
RW
RW
RW
25
RO
RO
RO
RW
RW
RW
RW
RW
PNX15xx/952x Series
24
RO
RO
RO
RO
RW
RW
RW
RW
24
RO
RO
RO
RO
RW
RW
RW
RW
23
RO
RO
RO
RO
RO
RW
RW
RW
23
RO
RO
RO
RO
RO
RW
RW
RW
Chapter 7: PCI-XIO Module
22
RO
RO
RO
RO
RO
RO
RW
RW
22
RO
RO
RO
RO
RO
RO
RW
RW
© NXP B.V. 2007. All rights reserved.
21
RO
RO
RO
RO
RO
RO
RO
RW
21
RO
RO
RO
RO
RO
RO
RO
RW
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