ST72F324BK6TAS STMicroelectronics, ST72F324BK6TAS Datasheet - Page 109

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ST72F324BK6TAS

Manufacturer Part Number
ST72F324BK6TAS
Description
8-BIT MCU
Manufacturer
STMicroelectronics
Datasheet
ST72324B-Auto
Note:
SPI Data I/O Register (SPIDR)
The SPIDR register is used to transmit and receive data on the serial bus. In a master
device, a write to this register will initiate transmission/reception of another byte.
During the last clock cycle the SPIF bit is set, a copy of the received data byte in the shift
register is moved to a buffer. When the user reads the serial peripheral data I/O register, the
buffer is actually being read.
While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR
register is read.
A read to the SPIDR register returns the value located in the buffer and not the content of
the shift register (see
Table 58.
SPIDR
Address (Hex.) Register label
R/W
D7
0021h
0022h
0023h
7
Warning:
SPI register map and reset values
R/W
D6
SPIDR
Reset value
SPICR
Reset value
SPICSR
Reset value
6
A write to the SPIDR register places data directly into the
shift register for transmission.
Figure
R/W
D5
5
48).
Doc ID13466 Rev 4
SPIE
MSB
SPIF
7
x
0
0
R/W
D4
4
WCOL
SPE
6
x
0
0
SPR2
OVR
R/W
5
x
0
0
D3
3
MODF
MSTR
4
0
0
x
R/W
D2
2
CPOL
3
x
x
0
Reset value: undefined
On-chip peripherals
CPHA
SOD
R/W
2
0
x
x
D1
1
SPR1
SSM
1
x
x
0
R/W
109/198
D0
0
SPR0
LSB
SSI
0
0
x
x

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